Statistical Clock Skew Analysis Considering Intra-Die Process Variations

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2003, Pages 914-921

  Agarwal, Aseem ^a   Blaauw, David ^a   Zolotov, Vladimir ^b  

^a UNIVERSITY OF MICHIGAN   (United States)

^b MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; MICROPROCESSOR CHIPS; MONTE CARLO METHODS; OPTIMIZATION; PROBABILITY; STATISTICAL METHODS; TOPOLOGY; TREES (MATHEMATICS);

CLOCK SKEW; INTRA-DIE PROCESSES;

INTEGRATED CIRCUIT LAYOUT;

EID: 0346778703     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iccad.2003.159783     Document Type: Conference Paper

References (21)

1. J. Cong, A. B. Kahng, C. K. Koh, C.-W. Albert Tsao, "Bounded-Skew Clock and Steiner Routing," ACM Trans. on Design Automation of Electronic Systems, vol. 3, pp. 341-388, 1998.
2. T. H. Chao, Y. C. Hsu, J. M. Ho, K. D. Boese, A. B. Kahng, "Zero Skew Clock Routing With Minimum Wirelength", IEEE Trans. on Circuits and Systems 39(11), November 1992, pp. 799-814.
3. B. Lu, J. Hu, G. Ellis, H. Su, "Process Variation Aware Clock Tree Routing," Proc. IEEE/ACM International Symposium on Physical Design, ISPD, 2003
4. G. Bai, S. Bobba, I.N. Hajj, "Static timing analysis including power supply noise effect on propagation delay in VLSI circuits," Proceedings IEEE/ACM Design Automation Conference, 2001, pp. 295-300
5. M. Zhao, K. Gala, V. Zolotov, Y. Fu, R. Panda, R. Ramkumar, B. Agarwal, "Worst Case Clock Skew Under Power Supply Variations", TAU 2002, December 2002
6. S. Nassif, "Delay Variability: Sources, Impacts and Trends," Proceedings of ISSCC, 2000.
7. A. Kahng, Y. Pati, "Subwavelength optical lithography: challenges and impacts on physical design," Proceedings of ISPD, 1999.
8. D. Boning et. al., "Manufacturing yield, reliability and failure analysis," SPIE Symposium on Microelectronic Manufacturing, Oct. 1996.
9. M. Orshansky, L. Milor, P. Chen, K. Keutzer, C. Hu, "Impact of systematic spatial intra-chip gate length variability on performance of high-speed digital circuits", ICCAD 2000, pp. 62-67.
10. V.Mehrotra, S.L.Sam, D.Boning, A.Chandrakasan, R.Vallishayee, S.Nassif "A methodology for modelling the effects of systematic within-die interconnect and device variation on circuit performance. DAC 2000.
11. Y.Liu, S.Nassif, L.T.Pileggi,A.J.Strojwas, "Impact of Interconnect Variations on the Clock Skew of a Gigahertz Microprocessor", DAC 2000.
12. E. Malavasi, S. Zanella, M. Cao, J. Uschersohn, M. Misheloff, C. Guardiani, "Impact analysis of process variability on clock skew," Proceedings International Symposium on Quality Electronic Design, 2002, Page(s): 129-132
13. X. Jiang, S. Horiguchi, "A Probabilistic Approach to Modeling Skews and the Largest Delays of General Clock Distribution Networks," ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (Tau) 2000, Dec. 2000, Pages: 21-26
14. X. Jiang, S. Horiguchi, "Statistical skew modeling for general clock distribution networks in presence of process variations," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume: 9 Issue: 5, Oct 2001. Page(s): 704-717.
15. D.Harris, S.Naffziger, "Statistical Clock Skew Modeling with Data Delay Variations", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume: 9 Issue: 6, Dec. 2001, Page(s): 888-898
16. J.J Liou, K.T. Cheng, S. Kundu, A. Krstic, "Fast Statistical Timing Analysis By Probabilistic Even Propagation", DAC 2001
17. Personal communication, Kerry Bernstein, IBM Corp., Burlington, VT.
18. M. Orshansky, K. Keutzer, "A general probabilistic framework for worst-case timing analysis", Proc. DAC 2002.
19. M. Berkelaar, "Statistical Delay Calculation, a Linear Time Method," Proc. of TAU, 1997.
20. Feller, W., P. "An Introduction to Probability Theory and its Applications", Vol. 1,2 John Wiley & Sons, New York, 1970.
21. L.Scheffer, "Explicit computation of performance as a function of process variation," Proc. of TAU, 2002.