Statistical Verification of Power Grids Considering Process-Induced Leakage Current Variations

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2003, Pages 770-777

  Ferzli, Imad A ^a   Najm, Farid N ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

DELAY CIRCUITS; LOGIC GATES; MICROPROCESSOR CHIPS; MOSFET DEVICES; SPURIOUS SIGNAL NOISE; STATISTICAL METHODS; THRESHOLD VOLTAGE; TRANSISTORS;

POWER GRIDS; STATISTICAL VOLTAGE DROP;

LEAKAGE CURRENTS;

EID: 0346148441     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iccad.2003.159764     Document Type: Conference Paper

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