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Volumn 19, Issue 12, 2000, Pages 1498-1506

EDA challenges facing future microprocessor design

Author keywords

Design correctness; Design flow; Design methodology; Design validation; Design verification; Electronic design automation; Low power design; Microprocessor design; Performance verification; Power management

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER HARDWARE DESCRIPTION LANGUAGES; MICROPROCESSOR CHIPS;

EID: 0034428063     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.898828     Document Type: Article
Times cited : (34)

References (11)
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  • 4
    • 33747490612 scopus 로고    scopus 로고
    • [Online] . Available: http://www.itrs.net/1999_ SIA_Roadmap/Home.htm
    • ITRS Roadmap (1999). [Online] . Available: http://www.itrs.net/1999_ SIA_Roadmap/Home.htm
    • ITRS Roadmap (1999).
  • 6
    • 33747511652 scopus 로고    scopus 로고
    • Available: http://www. intel.com/intel/museum/25anniv/hof/moore.htm
    • Intel web site. Intel Corp., Folsom, CA. [Online] . Available: http://www. intel.com/intel/museum/25anniv/hof/moore.htm
    • Folsom, CA. [Online] .
  • 9
  • 10
    • 33747463103 scopus 로고    scopus 로고
    • Available: http://www.src.org/ areas/cadts/pd.dgw
    • SRC Web Site PD problems. [Online] . Available: http://www.src.org/ areas/cadts/pd.dgw
    • SRC Web Site PD Problems. [Online] .


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.