CHISEL programming operation of scaled NOR flash EEPROMs - Effect of voltage scaling, device scaling and technological parameters

IEEE Transactions on Electron Devices

Volumn 50, Issue 10, 2003, Pages 2104-2111

  Mohapatra, Nihar R ^a   Nair, Deleep R ^a   Mahapatra, S ^a   Ramgopal Rao, V ^a   Shukuri, S ^b   Bude, Jeff D ^c  

^a INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

^b Hitachi   (Japan)

^c AGERE SYSTEMS   (United States)

Author keywords

Channel hot electron (CHE); Channel initiated secondary electron (CHISEL); Device scaling; Flash electrically erasable programmable read only memories (EEPROMs); Hot carriers; Monte Carlo simulation; Programming efficiency

Indexed keywords

COMPUTER SIMULATION; ELECTRIC NETWORK PARAMETERS; LOGIC DESIGN; LOGIC DEVICES; MONTE CARLO METHODS; VOLTAGE MEASUREMENT;

CHANNEL HOT ELECTRON; CHANNEL INITIATED SECONDARY ELECTRON; ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY;

FLASH MEMORY;

EID: 0142009676     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2003.817275     Document Type: Article

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