Methods for measurement and simulation of weak substrate coupling in high-speed bipolar ICs

IEEE Transactions on Microwave Theory and Techniques

Volumn 50, Issue 7, 2002, Pages 1705-1713

  Steiner, Wolfgang ^b   Pfost, Martin ^a,b   Rein, Hans Martin ^a,b   Stürmer, Anton ^c   Schüppen, Andreas ^d  

^a IEEE

^b RUHR UNIVERSITY BOCHUM   (Germany)

^c Atmel Germany IT13   (Germany)

^d Atmel   (Germany)

Author keywords

On wafer measurement techniques; Substrate coupling; Substrate coupling simulation

Indexed keywords

COMPUTER SIMULATION; COUPLED CIRCUITS; CROSSTALK; DISTORTION (WAVES); FABRICATION; SEMICONDUCTING SILICON COMPOUNDS; SUBSTRATES; WSI CIRCUITS;

ON-WAFER MEASUREMENT TECHNIQUES;

BIPOLAR INTEGRATED CIRCUITS;

EID: 0036647342     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/TMTT.2002.800392     Document Type: Article

References (19)

1. Efficient parasitic substrate modeling for monolithic mixed-A/D circuit design and verification
2. Computer-aided design considerations for mixed-signal coupling in RF integrated circuits
3. Principles of substrate crosstalk generation in CMOS circuits
4. Experimental comparison of substrate noise coupling using different wafer types
5. Experimental results and modeling of noise coupling in a lightly doped substrate
6. Experimental results and modeling techniques for substrate noise and mixed-signal integrated circuits
7. Modeling and analysis of substrate coupling in integrated circuits
8. Substrate coupling evaluation in BiCMOS technology
9. Analysis and experimental verification of digital substrate noise generation for epi-type substrates
10. A scalable substrate noise coupling model for design of mixed-signal IC's
11. Signal isolation in BiCMOS mixed mode integrated circuits
12. Substrate crosstalk reduction using SOI technology
13. Substrate crosstalk suppression capability of silicon-on-insulator substrates with buried ground planes (GPSOI)
14. Modeling substrate effects in the design of high-speed Si-bipolar IC's
15. Modeling and measurement of substrate coupling in Si-bipolar IC's up to 40 GHz
16. Robust algorithms for Txx network analyzer self-calibration procedures
17. Simulation of substrate coupling with special regard to shielding in high-speed Si/SiGe bipolar ICs
18. Design considerations for very-high-speed Si-bipolar IC's operating up to 50 Gb/s