On-chip ESD protection design for integrated circuits: An overview for IC designers

Microelectronics Journal

Volumn 32, Issue 9, 2001, Pages 733-747

  Wang, A Z ^a   Feng, H G ^a   Gong, K ^a   Zhan, R Y ^a   Stine, J ^a  

^a Illinois Institute of Technology   (United States)

Author keywords

CDM; Electrostatic discharging; ESD; HDM; Integrated circuits; MM

Indexed keywords

COMPUTER SIMULATION; ELECTRIC DISCHARGES; ELECTROSTATICS; INTEGRATED CIRCUIT TESTING; SEMICONDUCTOR DEVICE MODELS;

ELECTROSTATIC DISCHARGES (ESD);

INTEGRATED CIRCUIT LAYOUT;

EID: 0035452364     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2692(01)00060-X     Document Type: Article

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