Compact square-cell ESD structure for BiCMOS IC

Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting

Volumn , Issue , 1999, Pages 46-49

  Wang, A Z ^a   Tsay, C H ^a  

^a ILLINOIS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC IMPEDANCE; ELECTRIC POWER SUPPLIES TO APPARATUS; LEAKAGE CURRENTS; MOS DEVICES; SEMICONDUCTING SILICON; THRESHOLD VOLTAGE;

SQUARE CELL ESD STRUCTURES; TRANSMISSION LINE PULSE TEST;

SEMICONDUCTOR DEVICE STRUCTURES;

EID: 0033280508     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)