Direct tunnelling models for circuit simulation

Microelectronics Reliability

Volumn 41, Issue 7, 2001, Pages 951-957

  O'Sullivan, P ^a   Clerc, R ^b   McCarthy, K G ^c   Mathewson, A ^a   Ghibaudo, G ^b  

^a UNIVERSITY COLLEGE CORK   (Ireland)

^b Grenoble INP Phelma   (France)

^c UNIVERSITY COLLEGE CORK   (Ireland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED NETWORK ANALYSIS; COMPUTER SIMULATION; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; QUANTUM THEORY; SEMICONDUCTOR DEVICE MODELS;

DIRECT TUNNELING MODELS; GATE CURRENTS;

MOSFET DEVICES;

EID: 0035394739     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(01)00047-6     Document Type: Article

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