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Volumn 45, Issue 4, 2001, Pages 541-549

Fully depleted SOI CMOS technology for heterogeneous micropower, high-temperature or RF microsystems

Author keywords

Double gate; High temperature; Micropower; Microsystems; RF; Silicon on insulator

Indexed keywords

CMOS INTEGRATED CIRCUITS; MICROWAVES; THIN FILMS;

EID: 0035335740     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(01)00084-3     Document Type: Article
Times cited : (87)

References (42)
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  • 4
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    • Bruel, M.1
  • 6
    • 0026415990 scopus 로고
    • Problems in designing thin-film accumulation-mode p-channel SOI MOSFET's for CMOS digital circuit environment
    • (1991) Electron Lett , vol.27 , pp. 1280-1282
    • Flandre, D.1
  • 28
    • 0031122158 scopus 로고    scopus 로고
    • CMOS scaling into the nanometer regime
    • (1997) Proc IEEE , vol.85 , Issue.4 , pp. 486-504
    • Taur, Y.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.