Modelling and application of fully depleted SOI MOSFETs for low voltage, low power analogue CMOS circuits

Solid-State Electronics

Volumn 39, Issue 4 SPEC. ISS., 1996, Pages 455-460

  Flandre, D ^a   Ferreira, L F ^a   Jespers, P G A ^a   Colinge, J P ^a  

^a UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CALCULATIONS; CMOS INTEGRATED CIRCUITS; MATHEMATICAL TECHNIQUES; SILICON ON INSULATOR TECHNOLOGY;

LOW POWER CIRCUITS; LOW VOLTAGE CIRCUITS;

MOSFET DEVICES;

EID: 0030127650     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(95)00167-0     Document Type: Article

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