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Volumn 47, Issue 8, 2000, Pages 771-775

An on-chip clock-adjusting circuit with sub-100-ps resolution for a high-speed DRAM interface

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; INTERFACES (COMPUTER); MICROPROCESSOR CHIPS; RANDOM ACCESS STORAGE; RESPONSE TIME (COMPUTER SYSTEMS);

EID: 0034248856     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.861409     Document Type: Article
Times cited : (13)

References (15)
  • 2
    • 0031675318 scopus 로고    scopus 로고
    • A 450 MHz IA32 P6 family microprocessor, 236-237, 1998.
    • J. Schutz and R. Wallace, A 450 MHz IA32 P6 family microprocessor, ISSCC Tech. Dig., pp. 236-237, 1998.
    • ISSCC Tech. Dig., Pp.
    • Schutz, J.1    Wallace, R.2
  • 5
    • 0028757753 scopus 로고    scopus 로고
    • A2.5 V CMOS delay-locked loop for an 18 Mbit, 500 megabyte/s DRAM, vol. 29, pp. 1491-1496, Dec. 1994.
    • T. Eee, K. Donnelly, J. Ho, J.Zerbe.M. Eohnson.andT. Ishikawa, A2.5 V CMOS delay-locked loop for an 18 Mbit, 500 megabyte/s DRAM, IEEEJ. Solid-State Circuits, vol. 29, pp. 1491-1496, Dec. 1994.
    • IEEEJ. Solid-State Circuits
    • Eee, T.1    Donnelly, K.2    Ho, J.3    Ishikawa, J.Z.4
  • 8
    • 0030290680 scopus 로고    scopus 로고
    • Eow-jitter process-independent DEE and PEE based on self-biased techniques, vol. 31, pp. 1723-1732, Nov. 1996.
    • J. G. Maneatis, Eow-jitter process-independent DEE and PEE based on self-biased techniques, IEEE J. Solid-State Circuits, vol. 31, pp. 1723-1732, Nov. 1996.
    • IEEE J. Solid-State Circuits
    • Maneatis, J.G.1
  • 10
    • 33747617622 scopus 로고    scopus 로고
    • Clock buffer chip with absolute delay regulation over process and environmental variations, vol. 25.2, 1992.
    • R. B. Watson Jr., H. A. Collins, and R. Iknaian, Clock buffer chip with absolute delay regulation over process and environmental variations, CICC Tech. Dig., vol. 25.2, 1992.
    • CICC Tech. Dig.
    • Watson Jr., R.B.1    Collins, H.A.2    Iknaian, R.3
  • 13
    • 33746253359 scopus 로고    scopus 로고
    • Precise delay generation using coupled oscillators, 118-119, 1993.
    • J. G. Maneatis and M. A. Horowitz, Precise delay generation using coupled oscillators, ISSCC Tech. Dig., pp. 118-119, 1993.
    • ISSCC Tech. Dig., Pp.
    • Maneatis, J.G.1    Horowitz, M.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.