1.0 GHz single-issue 64b PowerPC integer processor

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 1998, Pages 230-231

  Silberman, J ^a   Aoki, N ^a   Boerstler, D ^a   Burns, J ^a   Dhong, S ^a   Essbaum, A ^a   Ghoshal, U ^a   Heidel, D ^a   Hofstee, P ^a   Lee, K ^a   Meltzer, D ^a   Ngo, H ^a   Nowka, S ^a   Posluszny, S ^a   Takahashi, O ^a  

^a Austin Research Lab   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CMOS INTEGRATED CIRCUITS; PARALLEL PROCESSING SYSTEMS; REDUCED INSTRUCTION SET COMPUTING; RESPONSE TIME (COMPUTER SYSTEMS); SEMICONDUCTOR DEVICE STRUCTURES; STORAGE ALLOCATION (COMPUTER); TRANSISTORS;

MULTIFUNCTIONAL FIXED POINT UNIT (MFXU); SINGLE ISSUE INTEGER PROCESSORS;

MICROPROCESSOR CHIPS;

EID: 0031710315     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)