256 Mb SDRAM using a register-controlled digital DLL

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 40, Issue , 1997, Pages 72-73

  Hatakeyama, Atsushi ^a   Mochizuki, Hirohiko ^a   Aikawa, Tadao ^a   Takita, Masato ^a   Ishii, Yuki ^a   Tsuboi, Hironobu ^a   Fujioka, Shin ya ^a   Yamaguchi, Shusaku ^a   Koga, Makoto ^a   Serizawa, Yuji ^a   Nishimura, Koichi ^a   Kawabata, Kuninori ^a   Okajima, Yoshinori ^a   Kawano, Michiari ^a   Kojima, Hideyuki ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CELLULAR ARRAYS; DELAY CIRCUITS; INTEGRATED CIRCUIT LAYOUT; SHIFT REGISTERS; THERMODYNAMIC STABILITY; TRANSISTORS;

CHEMICAL MECHANICAL POLISHING (CMP); REGISTER CONTROLLED DELAY LOCKED LOOP (RDLL);

RANDOM ACCESS STORAGE;

EID: 0031072202     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)