Precise delay generation using coupled oscillators

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 1993, Pages 118-119

  Maneatis, J G ^a   Horowitz, M A ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

OSCILLISTORS;

ARRAY OSCILLATORS; COUPLED OSCILLATORS; DELAY GENERATION; DIFFERENTIAL NONLINEARITY; FREQUENCY SENSITIVITY; INTEGRAL LINEARITIES; OPERATING RANGES; TWO-DIMENSIONAL ARRAYS;

CIRCUIT OSCILLATIONS;

EID: 33746253359     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.1993.280059     Document Type: Conference Paper

References (2)

1. Gasbarro, J., M. Horowitz, "A Single-Chip, Functional Tester for VLSI Circuits", ISSCC DIGEST OFTECHNICAL PAPERS, pp. 84-85. Feb. 1990.
2. Young, I., et al., "A PLL Clock Generator with 5 to llOMHz Lock Range for Microprocessors", ISSCC DIGEST OF TECHNICAL PAPERS, pp. 50-51, Feb. 1992.