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Volumn 47, Issue 63 PART 1, 1999, Pages 667-674

Advanced silicon 1c interconnect technology and design: present trends and rf wireless implications

Author keywords

Interconnect technology; Virtual Design Environment; Wireless technology projections

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER SOFTWARE; INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; PRINTED CIRCUIT DESIGN; SEMICONDUCTOR DEVICE MANUFACTURE; WIRELESS TELECOMMUNICATION SYSTEMS;

EID: 0033363025     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/22.769333     Document Type: Article
Times cited : (19)

References (35)
  • 4
    • 84886448151 scopus 로고    scopus 로고
    • Full copper wiring in a sub-0.25 micron CMOS ULSI technology
    • D. Edelstein et al., "Full copper wiring in a sub-0.25 micron CMOS ULSI technology," in Int. Electron Devices Meeting, 1997, pp. 773-776.
    • (1997) Int. Electron Devices Meeting , pp. 773-776
    • Edelstein, D.1
  • 5
    • 0031695978 scopus 로고    scopus 로고
    • Copper interconnects and reliability
    • C. K. Hu and J. M. E. Harper, "Copper interconnects and reliability," Materials, Chemistry, Phys., vol. 52, pp. 5-16, 1998.
    • (1998) Materials, Chemistry, Phys. , vol.52 , pp. 5-16
    • Hu, C.K.1    Harper, J.M.E.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.