VLSI configurable delay commutator for a pipeline split radix fft architecture

IEEE Transactions on Signal Processing

Volumn 47, Issue 11, 1999, Pages 3098-3107

  Garcia, Jesus ^a   Michell, Juan A ^a   Burön, Angel M ^a  

^a UNIVERSITY OF CANTABRIA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DELAY CIRCUITS; DIGITAL SIGNAL PROCESSING; ELECTRIC COMMUTATORS; FAST FOURIER TRANSFORMS; TIMING CIRCUITS;

TRUE SINGLE-PHASE-CLOCK (TSPC) CIRCUITS;

VLSI CIRCUITS;

EID: 0033221804     PISSN: 1053587X     EISSN: None     Source Type: Journal    
DOI: 10.1109/78.796442     Document Type: Article

References (18)

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