Efficient approach to simultaneous transistor and interconnect sizing

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1996, Pages 181-186

  Cong, Jason ^a   He, Lei ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; OPTIMIZATION; PROBLEM SOLVING; TRANSISTORS;

SIMULTANEOUS TRANSISTOR AND INTERCONNECT SIZING (STIS) PROBLEM;

LOGIC DESIGN;

EID: 0030381861     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (25)