A switched-current sensing architecture for a four-state per cell magnetic tunnel junction MRAM

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 51, Issue 11, 2004, Pages 2113-2122

  Au, Edward K S ^a   Ki, Wing Hung ^a   Mow, Wai Ho ^a   Hung, Silas T ^a   Wong, Catherine Y ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

Magneto resistive random access memory (MRAM); Search methods; Switched current (SI) technique

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; COMPUTER SIMULATION; MAGNETORESISTANCE; TUNNEL JUNCTIONS;

MAGNETO-RESISTIVE RANDOM ACCESS MEMORY; SWITCHED-CURRENT TECHNIQUE;

RANDOM ACCESS STORAGE;

EID: 9744273281     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2004.836868     Document Type: Article

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