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Volumn , Issue , 2002, Pages 135-140

A noise generator for analog-to-digital converter testing

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC GENERATORS; RECONFIGURABLE HARDWARE; SYSTEMS ANALYSIS; TESTING; WHITE NOISE;

EID: 84965115026     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2002.1137649     Document Type: Conference Paper
Times cited : (17)

References (21)
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  • 6
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  • 7
    • 0033309978 scopus 로고    scopus 로고
    • Testing High Speed High Accuracy Analog to Digital Converters Embedded in System on Chip
    • S. Max: "Testing High Speed High Accuracy Analog to Digital Converters Embedded in System on Chip". Proc. Int. Test Conf., pp.763-771, 1999.
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    • Max, S.1
  • 8
    • 0031357811 scopus 로고    scopus 로고
    • A Simplified Polynomial-Fitting Algorithm for DAC and ADC BIST
    • S. K. Sunter and N. Nagi: "A Simplified Polynomial-Fitting Algorithm for DAC and ADC BIST". Proc. Int. Test Conf., pp.389-395, 1997.
    • (1997) Proc. Int. Test Conf. , pp. 389-395
    • Sunter, S.K.1    Nagi, N.2
  • 9
    • 0021586344 scopus 로고
    • Full-Speed Testing of A/d Converters
    • J. Doernberg: "Full-Speed Testing of A/d Converters". IEEE Journal of Solid-State Circuits, pp.820-7, vol sc-19, no 6, 1984.
    • (1984) IEEE Journal of Solid-State Circuits , vol.SC-19 , Issue.6 , pp. 820-827
    • Doernberg, J.1
  • 10
    • 84965154339 scopus 로고    scopus 로고
    • An Embedded Servo loop for Testing ADC Linearity
    • Z. Zhao and A. Ivanoz: "An Embedded Servo loop for Testing ADC Linearity". Proc. Int. Test Conf., pp.24-34, 2001.
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    • Zhao, Z.1    Ivanoz, A.2
  • 11
    • 0037859112 scopus 로고    scopus 로고
    • Implementation of a Linear Histogram BIST for ADC
    • F. Azaïs et al.: "Implementation of a Linear Histogram BIST for ADC". Proc. Int. Test Conf., pp.590-595, 2000.
    • (2000) Proc. Int. Test Conf. , pp. 590-595
    • Azaïs, F.1
  • 12
    • 0034476235 scopus 로고    scopus 로고
    • Optimal INL/DNL Testing of A/D Converters Using Linear Model
    • S. Cherubal and A. Chatterjee: "Optimal INL/DNL Testing of A/D Converters Using Linear Model". Proc. Int. Test Conf., pp.358-366, 2000.
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    • Cherubal, S.1    Chatterjee, A.2
  • 13
    • 0034479554 scopus 로고    scopus 로고
    • Mearuring Code Edges of ADCs Using Interpolation and Its Application to Offset and Gain Error Testing
    • P. N. Variyam and V. Agrawal: "Mearuring Code Edges of ADCs Using Interpolation and Its Application to Offset and Gain Error Testing". Proc. Int. Test Conf., pp.349-357, 2000.
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    • Variyam, P.N.1    Agrawal, V.2
  • 14
    • 0033353554 scopus 로고    scopus 로고
    • Estimating the Integral Non-Linearity of AD-Converters via Frequency Domain
    • N. Csizmadia and A. J. E. M. Janssen: "Estimating the Integral Non-Linearity of AD-Converters via Frequency Domain." Proc. Int. Test Conf., pp.757-761, 1999.
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    • ADC Nonlinearities and Harmonic Distortion in FFT Test
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  • 20
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  • 21
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.