Hardware resource minimization for histogram-based ADC BIST

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2000, Pages 247-252

  Renovell, M ^a   Azais, F ^a   Bernard, S ^a   Bertrand, Y ^a  

^a UNIV MONTPELLIER   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CIRCUIT OSCILLATIONS; DIGITAL SIGNAL PROCESSING; ELECTRIC CONVERTERS; MIXER CIRCUITS; TRANSFER FUNCTIONS;

ANALOG TO DIGITAL CONVERTERS; HARDWARE RESOURCE MINIMIZATION; HISTOGRAM;

BUILT-IN SELF TEST;

EID: 0033743777     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (17)