A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 59, Issue , 2016, Pages 306-307

  Song, Taejoong ^a   Rim, Woojin ^a   Park, Sunghyun ^a   Kim, Yongho ^a   Jung, Jonghoon ^a   Yang, Giyong ^a   Baek, Sanghoon ^a   Choi, Jaeseung ^a   Kwon, Bongjae ^a   Lee, Yunwoo ^a   Kim, Sungbong ^a   Kim, Gyuhong ^a   Won, Hyo Sig ^a   Ku, Ja Hum ^a   Paak, Sunhom Steve ^a   Jung, Es ^a   Park, Steve Sungho ^a   Kim, Kinam ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

LOGIC DESIGN; RECONFIGURABLE HARDWARE;

ADVANCED PROCESS; AREA OPTIMIZATION; BIT CELL; MOBILE APPLICATION PROCESSOR; OPERATING VOLTAGE; SRAM DESIGN;

INTEGRATED CIRCUITS;

EID: 84962834045     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2016.7418029     Document Type: Conference Paper

References (10)

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