Challenge of MTJ-based nonvolatile logic-in-memory architecture for ultra low-power and highly dependable VLSI computing

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015

Volumn , Issue , 2015, Pages

  Hanyu, Takahiro ^a   Natsui, Masanori ^a   Suzuki, Daisuke ^a   Mochizuki, Akira ^a   Onizawa, Naoya ^a   Ikeda, Shoji ^a   Endoh, Tetsuo ^a   Ohno, Hideo ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; MEMORY ARCHITECTURE; MICROELECTRONICS; NONVOLATILE STORAGE; RECONFIGURABLE HARDWARE;

CONCRETE DESIGN; LSI ARCHITECTURE; NON-VOLATILE LOGIC; POWER WALLS; ULTRA LOW POWER;

COMPUTER CIRCUITS;

EID: 84961829031     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/S3S.2015.7333502     Document Type: Conference Paper

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