Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn 2015-August, Issue , 2015, Pages C172-C173

  Suzuki, D ^a   Natsui, M ^a   Mochizuki, A ^a   Miura, S ^a   Honjo, H ^a   Sato, H ^a   Fukami, S ^a   Ikeda, S ^a   Endoh, T ^a   Ohno, H ^a   Hanyu, T ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; DIGITAL STORAGE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LOGIC CIRCUITS; MAGNETIC DEVICES; NONVOLATILE STORAGE; RECONFIGURABLE HARDWARE; STATIC RANDOM ACCESS STORAGE; TABLE LOOKUP; TUNNEL JUNCTIONS; VIRTUAL STORAGE;

BENCHMARK CIRCUIT; DYNAMICALLY RECONFIGURABLE LOGIC; HARDWARE COMPONENTS; LOGIC IN MEMORY; MAGNETIC TUNNEL JUNCTION; NONVOLATILE FPGA; SRAM-BASED FPGA; STATIC POWER CONSUMPTION;

VLSI CIRCUITS;

EID: 84957867185     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2015.7231371     Document Type: Conference Paper

References (8)

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8. D. Suzuki, et al., Ext. Abstr. Int. Conf. SSDM, pp. 450-451, 2014.