Execution time prediction for energy-efficient hardware accelerators

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn 05-09-December-2015, Issue , 2015, Pages 457-469

  Chen, Tao ^a   Rucker, Alexander ^a   Suh, G Edward ^a  

^a Department of Molecular Biology and Genetics   (United States)

Author keywords

DVFS; energy efficiency; hardware accelerator

Indexed keywords

ACCELERATION; COMPUTER ARCHITECTURE; ENERGY CONSERVATION; HARDWARE; RECONFIGURABLE HARDWARE;

COMPUTATION-INTENSIVE TASK; CONSTANT FREQUENCY; DVFS; EVALUATION RESULTS; EXECUTION TIME PREDICTIONS; HARDWARE ACCELERATORS; MOBILE APPLICATIONS; TIME REQUIREMENTS;

ENERGY EFFICIENCY;

EID: 84959935097     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2830772.2830798     Document Type: Conference Paper

References (41)

1. Qualcomm Snapdragon 800 Product Brief. " https: //www. qualcomm. com/documents/snapdragon-800-processor-product-brief.
2. Inside the Apple A7 from the iPhone 5s. " http: //www. chipworks. com/en/technical-competitive-analysis/resources/blog/inside-the-a7/.
3. Chipworks Disassembles Apple's A8 SoC. " http: //www. anandtech. com/show/8562/chipworks-a8.
4. C. Ju, T. Liu, K. Lee, Y. Chang, H. Chou, C. Wang, T. Wu, H. Lin, Y. Huang, C. Cheng, T. Lin, C. Chen, Y. Lin, M. Chiu, W. Li, S. Wang, Y. Lai, P. Chao, C. Chien, M. Hu, P. Wang, F. Yeh, Y. Huang, S. Chuang, L. Chen, H. Lin, M. Wu, C. Chen, R. Chen, H. Y. Hsu, and K. Jou, "A 0. 5nJ/Pixel 4K H. 265/HEVC Codec LSI for Multi-Format Smartphone Applications, " in 2015 IEEE Int'l Solid-State Circuits Conf. (ISSCC), 2015.
5. Cortex-A7 Processor. " http: //www. arm. com/products/processors/cortex-a/cortex-a7. php.
6. J. Park, I. Hong, G. Kim, Y. Kim, K. Lee, S. Park, K. Bong, and H. Yoo, "A 646GOPS/W Multi-Classifier Many-Core Processor with Cortex-Like Architecture for Super-Resolution Recognition, " in 2013 IEEE Int'l Solid-State Circuits Conf. (ISSCC), 2013.
7. G. Kim, Y. Kim, K. Lee, S. Park, I. Hong, K. Bong, D. Shin, S. Choi, J. Oh, and H.-J. Yoo, "A 1. 22TOPS and 1. 52mW/MHz Augmented Reality Multi-Core Processor with Neural Network NoC for HMD Applications, " in 2014 IEEE Int'l Solid-State Circuits Conf. (ISSCC), 2014.
8. A. Putnam, A. M. Caulfield, E. S. Chung, D. Chiou, K. Constantinides, J. Demme, H. Esmaeilzadeh, J. Fowers, G. P. Gopal, J. Gray, M. Haselman, S. Hauck, S. Heil, A. Hormati, J. Kim, S. Lanka, J. R. Larus, E. Peterson, S. Pope, A. Smith, J. Thong, P. Y. Xiao, and D. Burger, "A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services, " in Proc. The ACM/IEEE 41st Int'l Symp. on Computer Architecture (ISCA), 2014.
9. D. Brodowski, "CPU Frequency and Voltage Scaling Code in the LinuxTMKernel. " https: //www. kernel. org/doc/Documentation/cpu-freq/governors. Txt.
10. K. Choi, K. Dantu, W.-C. Cheng, and M. Pedram, "Frame-Based Dynamic Voltage and Frequency Scaling for a MPEG Decoder, " in Proc. The 2002 IEEE/ACM Int'l Conf. on Computer-aided Design (ICCAD), 2002.
11. Y. Gu and S. Chakraborty, "Control Theory-based DVS for Interactive 3D Games, " in Proc. The 45th Annual Design Automation Conf. (DAC), 2008.
12. D. Lo, L. Cheng, R. Govindaraju, L. A. Barroso, and C. Kozyrakis, "Towards Energy Proportionality for Large-scale Latency-critical Workloads, " in Proc. The ACM/IEEE 41st Int'l Symp. on Computer Architecture (ISCA), 2014.
13. V. Petrucci, M. A. Laurenzano, J. Doherty, Y. Zhang, D. Mosse, J. Mars, and L. Tang, "Octopus-Man: QoS-Driven Task Management for Heterogeneous Multicores in Warehouse-Scale Computers, " in Proc. The 21st IEEE Int'l Symp. on High Performance Computer Architecture (HPCA), 2015.
14. Y. Gu and S. Chakraborty, "A Hybrid DVS Scheme for Interactive 3D Games, " in 14th IEEE Real-Time and Embedded Technology and Applications Symp. (RTAS), 2008.
15. Y. Zhu and V. J. Reddi, "High-performance and Energy-efficient Mobile Web Browsing on Big/Little Systems, " in Proc. The 19th IEEE Int'l Symp. on High-Performance Computer Architecture (HPCA), 2013.
16. Y. Zhu, M. Halpern, and V. J. Reddi, "Event-Based Scheduling for Energy-efficient QoS (eQoS) in Mobile Web Applications, " in Proc. The 21st IEEE Int'l Symp. on High Performance Computer Architecture (HPCA), 2015.
17. C.-H. Hsu, Y. Zhang, M. A. Laurenzano, D. Meisner, T. Wenisch, J. Mars, L. Tang, and R. G. Dreslinski, "Adrenaline: Pinpointing and Reining in Tail Queries with Quick Voltage Boosting, " in Proc. The 21st IEEE Int'l Symp. on High Performance Computer Architecture (HPCA), 2015.
18. N. C. Nachiappan, P. Yedlapalli, N. Soundararajan, A. Sivasubramaniam, M. T. Kandemir, R. Iyer, and C. R. Das, "Domain Knowledge Based Energy Management in Handhelds, " in Proc. The 21st IEEE Int'l Symp. on High Performance Computer Architecture (HPCA), 2015.
19. M. Weiser, B. Welch, A. Demers, and S. Shenker, "Scheduling for Reduced CPU Energy, " in Proc. The 1st USENIX Conf. on Operating Systems Design and Implementation (OSDI), 1994.
20. Samsung Exynos Linux Kernel Drivers. " https: //github. com/hardkernel/linux/blob/odroidxu3-3. 10. y/arch/arm/mach-exynos/include/mach/exynos-mfc. h.
21. V. Sze, D. F. Finchelstein, M. E. Sinangil, and A. P. Chandrakasan, "A 0. 7-V 1. 8-mW H. 264/AVC 720p Video Decoder, " IEEE Journal of Solid-State Circuits, vol. 44, no. 11, pp. 2943-2956, 2009.
22. M. Roitzsch, S. Wachtler, and H. Hartig, "ATLAS: Look-Ahead Scheduling Using Workload Metrics, " in Proc. The 19th IEEE Real-Time and Embedded Technology and Applications Symp. (RTAS), 2013.
23. C. Wolf, "Yosys Open SYnthesis Suite. " http: //www. clifford. at/yosys/.
24. Y. Shi, C. W. Ting, B. Gwee, and Y. Ren, "A Highly Eficient Method for Extracting FSMs from Flattened Gate-level Netlist, " in Int'l Symp. on Circuits and Systems (ISCAS), 2010.
25. R. Tibshirani, "Regression Shrinkage and Selection via the Lasso, " Journal of the Royal Statistical Society. Series B (Methodological), 1996.
26. E. Clarke, M. Fujita, S. Rajan, T. Reps, S. Shankar, and T. Teitelbaum, "Program Slicing of Hardware Description Languages, " in Conf. on Correct Hardware Design and Verification Methods, 1999.
27. R. Miftakhutdinov, E. Ebrahimi, and Y. N. Patt, "Predicting Performance Impact of DVFS for Realistic Memory Systems, " in Proc. The 45th Annual IEEE/ACM Int'l Symp. on Microarchitecture (MICRO), 2012.
28. K. Xu and C. Choy, "Low-power H. 264/AVC Baseline Decoder for Portable Applications, " in Proc. The 2007 Int'l Symp. on Low Power Electronics and Design, 2007.
29. W. Godycki, C. Torng, I. Bukreyev, A. Apsel, and C. Batten, "Enabling Realistic Fine-Grain Voltage Scaling with Reconfigurable Power Distribution Networks, " in Proc. The 47th Int'l Symp. on Microarchitecture (MICRO), 2014.
30. A. Beldachi and J. L. Nunez-Yanez, "Run-time Power and Performance Scaling in 28 nm FPGAs, " IET Computers & Digital Techniques, vol. 8, no. 4, pp. 178-186, 2014.
31. Video compression systems. " http: //opencores. org/project, video-systems.
32. JPEG Decoder in Verilog. " http: //opencores. org/project, djpeg.
33. B. Reagen, R. Adolf, Y. S. Shao, G. Wei, and D. M. Brooks, "MachSuite: Benchmarks for Accelerator Design and Customized Architectures, " in 2014 IEEE Int'l Symp. on Workload Characterization (IISWC), 2014.
34. AES (Rijndael) IP Core. " http: //opencores. org/project, aes-core.
35. SHA cores. " http: //opencores. org/project, sha-core.
36. W. Kim, M. Gupta, G.-Y. Wei, and D. Brooks, "System Level Analysis of Fast, Per-Core DVFS using On-chip Switching Regulators, " in Proc. The IEEE 14th Int'l Symp. on High Performance Computer Architecture (HPCA), 2008.
37. M. Weiser, "Program slicing, " in Proc. The 5th Int'l Conf. on Software Engineering, pp. 439-449, 1981.
38. D. Shin, J. Kim, and S. Lee, "Low-energy Intra-task Voltage Scheduling Using Static Timing Analysis, " in Proc. The 38th Annual Design Automation Conf. (DAC), 2001.
39. M. Ham, "devfreq: Generic Dynamic Voltage and Frequency Scaling (DVFS) Framework for Non-CPU Devices. " https: //github. com/torvalds/linux/tree/ master/drivers/devfreq.
40. P. P. Puschner and A. Burns, "Guest Editorial: A Review of Worst-Case Execution-Time Analysis, " Real-Time Systems, vol. 18, no. 2, pp. 115-128, 2000.
41. Y. Kwon, S. Lee, H. Yi, D. Kwon, S. Yang, B.-G. Chun, L. Huang, P. Maniatis, M. Naik, and Y. Paek, "Mantis: Automatic Performance Prediction for Smartphone Applications, " in Proc. The 2013 USENIX Annual Technical Conf., 2013.