A 0.7-V 1.8-mW H.264/AVC 720p video decoder

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 11, 2009, Pages 2943-2956

  Sze, Vivienne ^a   Finchelstein, Daniel F ^b   Sinangil, Mahmut E ^a   Chandrakasan, Anantha P ^a  

^a Massachusetts Institute of Technology Cambridge   (United States)

^b NVIDIA   (United States)

Author keywords

Cache memories; CMOS digital integrated circuits; CMOS memory circuits; H.264 AVC; Low power electronics; SRAM chips; Video codecs

Indexed keywords

CMOS DIGITAL INTEGRATED CIRCUITS; CMOS MEMORY CIRCUITS; H.264/AVC; SRAM CHIPS; VIDEO CODECS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER GRAPHICS; DECODING; DIGITAL INTEGRATED CIRCUITS; IMAGE COMPRESSION; INTEGRATED CIRCUITS; MOTION PICTURE EXPERTS GROUP STANDARDS; POWER ELECTRONICS; STATIC RANDOM ACCESS STORAGE; VIDEO CONFERENCING; VISUAL COMMUNICATION;

CACHE MEMORY;

EID: 70449375957     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2028933     Document Type: Article

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