End-bonded contacts for carbon nanotube transistors with low, size-independent resistance

Science

Volumn 350, Issue 6256, 2015, Pages 68-72

  Cao, Qing ^a   Han, Shu Jen ^a   Tersoff, Jerry ^a   Franklin, Aaron D ^a,b   Zhu, Yu ^a   Zhang, Zhen ^a,c   Tulevski, George S ^a   Tang, Jianshi ^a   Haensch, Wilfried ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b USA   (United States)

^c UPPSALA UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

MOLYBDENUM; SINGLE WALLED NANOTUBE;

ELECTRIC FIELD; ELECTRONIC EQUIPMENT; FULLERENE; MOLYBDENUM; PERFORMANCE ASSESSMENT; SILICON;

ARTICLE; ELECTRODE; FILM; PRIORITY JOURNAL; SCANNING ELECTRON MICROSCOPY; SCANNING TRANSMISSION ELECTRON MICROSCOPY; SEMICONDUCTOR; TEMPERATURE; X RAY DIFFRACTION;

EID: 84947911668     PISSN: 00368075     EISSN: 10959203     Source Type: Journal    
DOI: 10.1126/science.aac8006     Document Type: Article

References (38)

1. T. N. Theis, P. M. Solomon, Science 327, 1600-1601 (2010).
2. W. Haensch et al., IBM J. Res. Develop. 50, 339-361 (2006).
3. R. F. Service, Science 323, 1000-1002 (2009).
4. J. A. del Alamo, Nature 479, 317-323 (2011).
5. G. S. Tulevski et al., ACS Nano 8, 8730-8745 (2014).
6. J. Appenzeller, Proc. IEEE 96, 201-211 (2008).
7. A. D. Franklin, Nature 498, 443-444 (2013).
8. A. D. Franklin et al., Nano Lett. 12, 758-762 (2012).
9. F. Kreupl, Nature 484, 321-322 (2012).
10. A. D. Franklin et al., Nano Lett. 13, 2490-2495 (2013).
11. C. D. Cress, S. Datta, Science 341, 140-141 (2013).
12. Q. Cao et al., Nature 454, 495-500 (2008).
13. M. M. Shulaker et al., Nature 501, 526-530 (2013).
14. J. Appenzeller et al., Phys. Rev. Lett. 89, 126801 (2002).
15. F. Léonard, A. A. Talin, Nat. Nanotechnol. 6, 773-783 (2011).
16. A. Javey, J. Guo, Q. Wang, M. Lundstrom, H. Dai, Nature 424, 654-657 (2003).
17. N. Nemec, D. Tománek, G. Cuniberti, Phys. Rev. Lett. 96, 076802 (2006).
18. F. Xia, V. Perebeinos, Y. M. Lin, Y. Wu, P. Avouris, Nat. Nanotechnol. 6, 179-184 (2011).
19. P. M. Solomon, IEEE Electron Device Lett. 32, 246-248 (2011).
20. A. D. Franklin, D. B. Farmer, W. Haensch, ACS Nano 8, 7333-7339 (2014).
21. A. D. Franklin, Z. Chen, Nat. Nanotechnol. 5, 858-862 (2010).
22. International technology roadmap for semiconductors (ITRS, www.itrs.net) predicts that the device Lch should shrink to 10 nm by the 2020 time frame, with length of 9 nm for contacts. For a realistic carbon nanotube transistor consisting of a nanotube array with a tube pitch of 8 nm, when scaled to Lc of 9 nm the effective device contact resistance per width for best side-bonded Pd contacts becomes 520 ohm mm, which is two to three times higher than that of current silicon MOSFETs.
23. J. J. Palacios, A. J. Pérez-Jiménez, E. Louis, E. SanFabián, J. A. Vergés, Phys. Rev. Lett. 90, 106801 (2003).
24. V. Vitale, A. Curioni, W. Andreoni, J. Am. Chem. Soc. 130, 5848-5849 (2008).
25. Y. Matsuda, W.-Q. Deng, W. A. Goddard III, J. Phys. Chem. C 114, 17845-17850 (2010).
26. Y. Zhang, T. Ichihashi, E. Landree, F. Nihey, S. Iijima, Science 285, 1719-1722 (1999).
27. J. A. Rodríguez-Manzo et al., Proc. Natl. Acad. Sci. U.S.A. 106, 4591-4595 (2009).
28. M.-S. Wang, D. Golberg, Y. Bando, Adv. Mater. 22, 5350-5355 (2010).
29. R. Martel et al., Phys. Rev. Lett. 87, 256805 (2001).
30. Z. Chen, J. Appenzeller, J. Knoch, Y. M. Lin, P. Avouris, Nano Lett. 5, 1497-1502 (2005).
31. A. E. Morgan, E. K. Broadbent, K. N. Ritz, D. K. Sadana, B. J. Burrow, J. Appl. Phys. 64, 344-353 (1988).
32. W. P. Leroy, C. Detavernier, R. L. Van Meirhaeghe, C. Lavoie, J. Appl. Phys. 101, 053714 (2007).
33. Materials and methods are available as supplementary materials on Science Online.
34. Q. Cao et al., Nat. Nanotechnol. 8, 180-186 (2013).
35. Z. Zhen et al., IEEE Electron Device Lett. 34, 723-725 (2013).
36. K. L. Grosse, M.-H. Bae, F. Lian, E. Pop, W. P. King, Nat. Nanotechnol. 6, 287-290 (2011).
37. ITRS predicts that overall source/drain parasitic resistance per width should be 256 ohm mm for multigate transistors targeting at high-performance applications at 1.3 nm technology node with a Lc less than 4 nm in 2028. However, no manufacturable solutions are known to keep this resistance level upon scaling beyond even a 7-nm node from 2018.
38. J. Zhang, C. Wang, Y. Fu, Y. Che, C. Zhou, ACS Nano 5, 3284-3292 (2011).