Distributed topology discovery in self-assembled nano network-on-chip

Computers and Electrical Engineering

Volumn 40, Issue 8, 2014, Pages 292-306

  Catania, Vincenzo ^a   Mineo, Andrea ^a   Monteleone, Salvatore ^a   Patti, Davide ^a  

^a UNIVERSITY OF CATANIA   (Italy)

Author keywords

Deadlock; DNA; Nanotechnology; Routing; Self assembly

Indexed keywords

BUDGET CONTROL; DEFECTS; DNA; FAULT TOLERANT COMPUTER SYSTEMS; GRAPH ALGORITHMS; NANOTECHNOLOGY; NETWORK-ON-CHIP; SELF ASSEMBLY; SERVERS;

CENTRALIZED ALGORITHMS; CONCEPTUAL ELEMENTS; DEADLOCK; DISTRIBUTED APPROACHES; HARDWARE IMPLEMENTATIONS; HARDWARE REDUNDANCY; ROUTING; TREE-BASED APPROACH;

TOPOLOGY;

EID: 84916933669     PISSN: 00457906     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.compeleceng.2014.09.003     Document Type: Article

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