DWM-TAPESTRI - An energy efficient all-spin cache using Domain wall Shift based Writes

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2013, Pages 1825-1830

  Venkatesan, Rangharajan ^a   Sharad, Mrigank ^a   Roy, Kaushik ^a   Raghunathan, Anand ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; DOMAIN WALLS; ENERGY EFFICIENCY; MRAM DEVICES; STATIC RANDOM ACCESS STORAGE;

CACHE HIERARCHIES; CIRCUIT LEVELS; DEVICE CIRCUITS; ENERGY EFFICIENT; NEW APPROACHES; ON CHIP MEMORY; SHIFT OPERATIONS; WRITE OPERATIONS;

CACHE MEMORY;

EID: 84885665745     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/date.2013.365     Document Type: Conference Paper

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