-
2
-
-
70349163184
-
-
Springer, Dordrecht, The Netherlands
-
Ho T.-Y., Chang Y.-W., Chen S.-J. Full-Chip Nanometer Routing Techniques 2007, Springer, Dordrecht, The Netherlands.
-
(2007)
Full-Chip Nanometer Routing Techniques
-
-
Ho, T.-Y.1
Chang, Y.-W.2
Chen, S.-J.3
-
6
-
-
34247586283
-
Multilevel full-chip gridless routing with applications to optical proximity correction
-
Chen T.-C., Chang Y.-W. Multilevel full-chip gridless routing with applications to optical proximity correction. IEEE Trans. on Computer-Aided Design June 2007, 26(6):1041-1053.
-
(2007)
IEEE Trans. on Computer-Aided Design
, vol.26
, Issue.6
, pp. 1041-1053
-
-
Chen, T.-C.1
Chang, Y.-W.2
-
8
-
-
0021120760
-
Corner stitching: A data structuring technique for VLSI layout tools
-
Qusterhout J.K. Corner stitching: A data structuring technique for VLSI layout tools. IEEE Trans. on Computer-Aided Design January 1984, 3(1):87-100.
-
(1984)
IEEE Trans. on Computer-Aided Design
, vol.3
, Issue.1
, pp. 87-100
-
-
Qusterhout, J.K.1
-
9
-
-
0029735074
-
Finding obstacle avoiding shortest paths using implicit connection graphs
-
Zheng S.Q., Lim J.S., Iyengar S.S. Finding obstacle avoiding shortest paths using implicit connection graphs. IEEE Trans. on Computer-Aided Design January 1996, 15(1):103-110.
-
(1996)
IEEE Trans. on Computer-Aided Design
, vol.15
, Issue.1
, pp. 103-110
-
-
Zheng, S.Q.1
Lim, J.S.2
Iyengar, S.S.3
-
10
-
-
84938021331
-
A modification of Lee's path connection algorithm
-
Akers S.B. A modification of Lee's path connection algorithm. IEEE Trans. on Electronic Computers February 1967, 16(1):97-98.
-
(1967)
IEEE Trans. on Electronic Computers
, vol.16
, Issue.1
, pp. 97-98
-
-
Akers, S.B.1
-
12
-
-
0017725650
-
A shortest path algorithm for grid graphs
-
Hadlock F.O. A shortest path algorithm for grid graphs. Networks Winter, 1977, 7(4):323-334.
-
(1977)
Networks
, vol.7
, Issue.4
, pp. 323-334
-
-
Hadlock, F.O.1
-
14
-
-
0002778283
-
A solution to line routing problems on the continuous plane
-
Hightower D. A solution to line routing problems on the continuous plane. Proc. ACM/IEEE Design Automation Conf. June 1969, 1-24.
-
(1969)
Proc. ACM/IEEE Design Automation Conf.
, pp. 1-24
-
-
Hightower, D.1
-
15
-
-
84882536619
-
An algorithm for path connection and its application
-
Lee C.Y. An algorithm for path connection and its application. IRE Trans. on Electronic Computer 1961, 10:346-365.
-
(1961)
IRE Trans. on Electronic Computer
, vol.10
, pp. 346-365
-
-
Lee, C.Y.1
-
19
-
-
0015434189
-
On the ordering of connections for automatic wire routing
-
Abel L.C. On the ordering of connections for automatic wire routing. IEEE Trans. on Computers November 1972, 21(11):1227-1233.
-
(1972)
IEEE Trans. on Computers
, vol.21
, Issue.11
, pp. 1227-1233
-
-
Abel, L.C.1
-
21
-
-
0033309875
-
Integrated floorplanning and interconnect planning
-
Chen H.-M., Zhou H., Young F.Y., Wong D.F., Yang H.H., Sherwani N. Integrated floorplanning and interconnect planning. Proc. IEEE/ACM Int. Conf. on computer-Aided Design November 1999, 354-357.
-
(1999)
Proc. IEEE/ACM Int. Conf. on computer-Aided Design
, pp. 354-357
-
-
Chen, H.-M.1
Zhou, H.2
Young, F.Y.3
Wong, D.F.4
Yang, H.H.5
Sherwani, N.6
-
22
-
-
43349093583
-
BoxRouter 2.0: Architecture and implementation of a hybrid and robust global router
-
Cho M., Lu K., Yuan K., Pan D.Z. BoxRouter 2.0: Architecture and implementation of a hybrid and robust global router. Proc. ACM/IEEE Design Automation Conf. June 2007, 503-508.
-
(2007)
Proc. ACM/IEEE Design Automation Conf.
, pp. 503-508
-
-
Cho, M.1
Lu, K.2
Yuan, K.3
Pan, D.Z.4
-
24
-
-
16244366458
-
FLUTE: fast lookup table based wirelength estimation technique
-
Chu C. FLUTE: fast lookup table based wirelength estimation technique. Proc. IEEE/ACM Int. Conf. on Computer-Aided Design November 2004, 696-701.
-
(2004)
Proc. IEEE/ACM Int. Conf. on Computer-Aided Design
, pp. 696-701
-
-
Chu, C.1
-
25
-
-
0000727336
-
The rectilinear Steiner tree problem is NP-complete
-
Garey M.R., Johnson D.S. The rectilinear Steiner tree problem is NP-complete. SIAM Journal Applied Mathematics June 1977, 32(4):826-834.
-
(1977)
SIAM Journal Applied Mathematics
, vol.32
, Issue.4
, pp. 826-834
-
-
Garey, M.R.1
Johnson, D.S.2
-
26
-
-
0000814769
-
On Steiner's problem with rectilinear distance
-
Hanan M. On Steiner's problem with rectilinear distance. SIAM Journal on Applied Mathematics March 1966, 14(2):255-265.
-
(1966)
SIAM Journal on Applied Mathematics
, vol.14
, Issue.2
, pp. 255-265
-
-
Hanan, M.1
-
29
-
-
0016891335
-
On Steiner minimal tree with rectilinear distance
-
Hwang F.K. On Steiner minimal tree with rectilinear distance. SIAM Journal on Applied Mathematics January 1976, 30(1):104-114.
-
(1976)
SIAM Journal on Applied Mathematics
, vol.30
, Issue.1
, pp. 104-114
-
-
Hwang, F.K.1
-
30
-
-
0025545054
-
A new class of Steiner tree heuristics with good performance: the iterated 1-Steiner approach
-
Kahng A.B., Robins G. A new class of Steiner tree heuristics with good performance: the iterated 1-Steiner approach. Proc. IEEE/ACM Int. Conf. on Computer-Aided Design November 1990, 428-431.
-
(1990)
Proc. IEEE/ACM Int. Conf. on Computer-Aided Design
, pp. 428-431
-
-
Kahng, A.B.1
Robins, G.2
-
31
-
-
0036638291
-
Pattern routing: use and theory for increasing predictability and avoiding coupling
-
Kastner R., Bozorgzadeh E., Sarrafzadeh M. Pattern routing: use and theory for increasing predictability and avoiding coupling. IEEE Trans. on Computer-Aided Design November 2002, 21(7):777-790.
-
(2002)
IEEE Trans. on Computer-Aided Design
, vol.21
, Issue.7
, pp. 777-790
-
-
Kastner, R.1
Bozorgzadeh, E.2
Sarrafzadeh, M.3
-
32
-
-
70350674995
-
On the shortest spanning subtree of a graph and the traveling salesman problem
-
Kruskal J.B. On the shortest spanning subtree of a graph and the traveling salesman problem. Proc. the American Mathematical Society February 1956, 7(1):48-50.
-
(1956)
Proc. the American Mathematical Society
, vol.7
, Issue.1
, pp. 48-50
-
-
Kruskal, J.B.1
-
33
-
-
41549127689
-
Obstacle-avoiding rectilinear Steiner tree construction based on spanning graphs
-
Lin C.-W., Chen S.-Y., Li C.-F., Chang Y.-W., Yang C.-L. Obstacle-avoiding rectilinear Steiner tree construction based on spanning graphs. IEEE Trans. Computer-Aided Design April 2008, 27(4):643-653.
-
(2008)
IEEE Trans. Computer-Aided Design
, vol.27
, Issue.4
, pp. 643-653
-
-
Lin, C.-W.1
Chen, S.-Y.2
Li, C.-F.3
Chang, Y.-W.4
Yang, C.-L.5
-
34
-
-
43349090645
-
Efficient multi-layer obstacle-avoiding rectilinear Steiner tree construction
-
Lin C.-W., Huang S.-L., Hsu K.-C., Lee M.-X., Chang Y.-W. Efficient multi-layer obstacle-avoiding rectilinear Steiner tree construction. Proc. IEEE/ACM Int. Conf. on Computer-Aided Design November 2007, 380-385.
-
(2007)
Proc. IEEE/ACM Int. Conf. on Computer-Aided Design
, pp. 380-385
-
-
Lin, C.-W.1
Huang, S.-L.2
Hsu, K.-C.3
Lee, M.-X.4
Chang, Y.-W.5
-
37
-
-
84911584312
-
Shortest connection networks and some generalizations
-
Prim R.C. Shortest connection networks and some generalizations. Bell System Technical Journal 1957, 36:1389-1401.
-
(1957)
Bell System Technical Journal
, vol.36
, pp. 1389-1401
-
-
Prim, R.C.1
-
38
-
-
51249173817
-
Randomized rounding: A technique for provably good algorithms and algorithmic proofs
-
Raghavan P., Thompson C.D. Randomized rounding: A technique for provably good algorithms and algorithmic proofs. Proc. Combinatorica December 1987, 365-374.
-
(1987)
Proc. Combinatorica
, pp. 365-374
-
-
Raghavan, P.1
Thompson, C.D.2
-
40
-
-
33748615409
-
CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model
-
Shi Y., Jing T., He L., Feng Z., Hong X. CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model. Proc. IEEE/ACM Asia and South Pacific Design Automation Conf. January 2006, 630-635.
-
(2006)
Proc. IEEE/ACM Asia and South Pacific Design Automation Conf.
, pp. 630-635
-
-
Shi, Y.1
Jing, T.2
He, L.3
Feng, Z.4
Hong, X.5
-
41
-
-
2542477033
-
Efficient Steiner tree construction based on spanning graphs
-
Zhou H. Efficient Steiner tree construction based on spanning graphs. IEEE Trans. on Computer-Aided Design May 2004, 23(5):704-710.
-
(2004)
IEEE Trans. on Computer-Aided Design
, vol.23
, Issue.5
, pp. 704-710
-
-
Zhou, H.1
-
43
-
-
2542428408
-
MR: A new framework for multilevel full-chip routing
-
Chang Y.-W., Lin S.-P. MR: A new framework for multilevel full-chip routing. IEEE Trans. on Computer-Aided Design May 2004, 23(5):793-800.
-
(2004)
IEEE Trans. on Computer-Aided Design
, vol.23
, Issue.5
, pp. 793-800
-
-
Chang, Y.-W.1
Lin, S.-P.2
-
47
-
-
85050951333
-
Wire routing by optimizing channel assignment within large apertures
-
Hashimoto A., Stevens J. Wire routing by optimizing channel assignment within large apertures. Proc. ACM/IEEE Design Automation Conf. June 1971, 155-169.
-
(1971)
Proc. ACM/IEEE Design Automation Conf.
, pp. 155-169
-
-
Hashimoto, A.1
Stevens, J.2
-
53
-
-
42649135869
-
Full-chip routing considering double-via insertion
-
Chen H.-Y., Chiang M.-F., Chang Y.-W., Chen L., Han B. Full-chip routing considering double-via insertion. IEEE Trans. on Computer-Aided Design May 2008, 27(5):844-857.
-
(2008)
IEEE Trans. on Computer-Aided Design
, vol.27
, Issue.5
, pp. 844-857
-
-
Chen, H.-Y.1
Chiang, M.-F.2
Chang, Y.-W.3
Chen, L.4
Han, B.5
-
54
-
-
34247586283
-
Multilevel full-chip gridless routing with applications to optical proximity correction
-
Chen T.-C., Chang Y.-W. Multilevel full-chip gridless routing with applications to optical proximity correction. IEEE Trans. on Computer-Aided Design June 2007, 26(6):1041-1053.
-
(2007)
IEEE Trans. on Computer-Aided Design
, vol.26
, Issue.6
, pp. 1041-1053
-
-
Chen, T.-C.1
Chang, Y.-W.2
-
62
-
-
20444504622
-
Crosstalk- and performance-driven multilevel full-chip routing
-
Ho T.-Y., Chang Y.-W., Chen S.-J., Lee D.-T. Crosstalk- and performance-driven multilevel full-chip routing. IEEE Trans. on Computer-Aided Design June 2005, 24(6):869-878.
-
(2005)
IEEE Trans. on Computer-Aided Design
, vol.24
, Issue.6
, pp. 869-878
-
-
Ho, T.-Y.1
Chang, Y.-W.2
Chen, S.-J.3
Lee, D.-T.4
-
63
-
-
0347131040
-
A polynomial time-optimal diode insertion/routing algorithm for fixing antenna problem
-
Huang L.-D., Tang X., Xiang H., Wong D.F., Liu I.-M. A polynomial time-optimal diode insertion/routing algorithm for fixing antenna problem. IEEE Trans. on Computer-Aided Design January 2004, 23(1):141-147.
-
(2004)
IEEE Trans. on Computer-Aided Design
, vol.23
, Issue.1
, pp. 141-147
-
-
Huang, L.-D.1
Tang, X.2
Xiang, H.3
Wong, D.F.4
Liu, I.-M.5
-
65
-
-
44149087898
-
An optimal network-flow-based simultaneous diode and jumper insertion algorithm for antenna fixing
-
Jiang Z.-W., Chang Y.-W. An optimal network-flow-based simultaneous diode and jumper insertion algorithm for antenna fixing. IEEE Trans. on Computer-Aided Design June 2008, 27(6):1055-1065.
-
(2008)
IEEE Trans. on Computer-Aided Design
, vol.27
, Issue.6
, pp. 1055-1065
-
-
Jiang, Z.-W.1
Chang, Y.-W.2
-
66
-
-
0034259185
-
Crosstalk-driven interconnect optimization by simultaneous gate and wire sizing
-
Jiang I.H.-R., Chang Y.-W., Jou J.-Y. Crosstalk-driven interconnect optimization by simultaneous gate and wire sizing. IEEE Trans. on Computer-Aided Design September 2000, 19(9):999-1010.
-
(2000)
IEEE Trans. on Computer-Aided Design
, vol.19
, Issue.9
, pp. 999-1010
-
-
Jiang, I.H.-R.1
Chang, Y.-W.2
Jou, J.-Y.3
-
69
-
-
34548268617
-
Multilevel full-chip routing with testability and yield enhancement
-
Li K.S.-M., Lee C.-L., Chang Y.-W., Su C.-C., Chen J.E. Multilevel full-chip routing with testability and yield enhancement. IEEE Trans. on Computer-Aided Design September 2007, 26(9):1625-1636.
-
(2007)
IEEE Trans. on Computer-Aided Design
, vol.26
, Issue.9
, pp. 1625-1636
-
-
Li, K.S.-M.1
Lee, C.-L.2
Chang, Y.-W.3
Su, C.-C.4
Chen, J.E.5
-
71
-
-
0020704286
-
Simple formulas for two and three dimensional capacitance
-
Sakurai T., Tamaru K. Simple formulas for two and three dimensional capacitance. IEEE Trans. on Electronic Devices February 1983, 30(2):183-185.
-
(1983)
IEEE Trans. on Electronic Devices
, vol.30
, Issue.2
, pp. 183-185
-
-
Sakurai, T.1
Tamaru, K.2
-
72
-
-
34748887657
-
An optimal jumper insertion algorithm for antenna avoidance/fixing
-
Su B.-Y., Chang Y.-W., Hu J. An optimal jumper insertion algorithm for antenna avoidance/fixing. IEEE Trans. on Computer-Aided Design October 2007, 26(10):1818-1929.
-
(2007)
IEEE Trans. on Computer-Aided Design
, vol.26
, Issue.10
, pp. 1818-1929
-
-
Su, B.-Y.1
Chang, Y.-W.2
Hu, J.3
-
73
-
-
0033719809
-
Model-based dummy feature placement for oxide chemical-mechanical polishing manufacturability
-
Tian R., Wong D.F., Boone R. Model-based dummy feature placement for oxide chemical-mechanical polishing manufacturability. Proc. ACM/IEEE Design Automation Conf. June 2000, 667-670.
-
(2000)
Proc. ACM/IEEE Design Automation Conf.
, pp. 667-670
-
-
Tian, R.1
Wong, D.F.2
Boone, R.3
-
74
-
-
0033320052
-
Crosstalk in VLSI interconnections
-
Vittal A., Chen L.H., Marek-Sadowska M., Wang K.-P., Yang S. Crosstalk in VLSI interconnections. IEEE Trans. on Computer-Aided Design December 1999, 18(12):1817-1824.
-
(1999)
IEEE Trans. on Computer-Aided Design
, vol.18
, Issue.12
, pp. 1817-1824
-
-
Vittal, A.1
Chen, L.H.2
Marek-Sadowska, M.3
Wang, K.-P.4
Yang, S.5
-
75
-
-
84882894454
-
-
An 'intelligent' approach to dummy fill, in EE Times, January 3, 2005.
-
D. White and B. Moore, An 'intelligent' approach to dummy fill, in EE Times, January 3, 2005.
-
-
-
White, D.1
Moore, B.2
-
76
-
-
29144447984
-
Coupling aware tuning optimization and antenna avoidance in layer assignment
-
Wu D., Hu J., Mahapatra R. Coupling aware tuning optimization and antenna avoidance in layer assignment. Proc. ACM. Int. Symp. on Physical Design April 2005, 20-27.
-
(2005)
Proc. ACM. Int. Symp. on Physical Design
, pp. 20-27
-
-
Wu, D.1
Hu, J.2
Mahapatra, R.3
-
79
-
-
29244437919
-
Improved multilevel routing with redundant via placement for yield and reliability
-
Yao H., Cai Y., Hong X., Zhou Q. Improved multilevel routing with redundant via placement for yield and reliability. Proc. ACM Great Lakes Symp. on VLSI April 2005, 143-146.
-
(2005)
Proc. ACM Great Lakes Symp. on VLSI
, pp. 143-146
-
-
Yao, H.1
Cai, Y.2
Hong, X.3
Zhou, Q.4
|