A novel framework for multilevel routing considering routability and performance

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2002, Pages 44-50

  Lin, Shih Ping ^a   Chang, Yao Wen ^b  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

DETAILED ROUTING; GLOBAL ROUTING; MULTILEVEL ROUTING; RESOURCE ESTIMATION; ROUTABILITY;

ALGORITHMS; CROSSTALK; FIELD PROGRAMMABLE GATE ARRAYS; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; ROUTERS; SIMULATED ANNEALING;

VLSI CIRCUITS;

EID: 0036907026     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/774572.774579     Document Type: Conference Paper

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