Design and performance of pseudo-spin-MOSFETs using nano-CMOS devices

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2012, Pages

  Shuto, Y ^a,d   Yamamoto, S ^a   Sukegawa, H ^a,b   Wen, Z C ^a,b   Nakane, R ^a,c   Mitani, S ^a,b   Tanaka, M ^a,c   Inomata, K ^a,b   Sugahara, S ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^b NATIONAL INSTITUTE FOR MATERIALS SCIENCE   (Japan)

^c UNIVERSITY OF TOKYO   (Japan)

^d KANAGAWA ACADEMY OF SCIENCE AND TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT-INDUCED MAGNETIZATION SWITCHING; HYBRID INTEGRATION; MAGNETIC TUNNEL JUNCTION; MOS-FET; NANO CMOS; NONVOLATILE SRAM;

CMOS INTEGRATED CIRCUITS; ELECTRON DEVICES;

MOSFET DEVICES;

EID: 84876099996     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2012.6479131     Document Type: Conference Paper

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