Enhancement of data retention and write current scaling for sub-20nm STT-MRAM by utilizing dual interfaces for perpendicular magnetic anisotropy

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2012, Pages 57-58

  Park, Jeong Heon ^a   Kim, Y ^a   Lim, W C ^a   Kim, J H ^a,a   Park, S H ^a   Kim, W ^a   Kim, K W ^a   Jeong, J H ^a   Kim, K S ^a   Kim, H ^a   Lee, Y J ^a   Oh, S C ^a   Lee, J E ^a   Park, S O ^a   Watts, S ^b   Apalkov, D ^b   Nikitin, V ^b   Krounbi, M ^b   Jeong, S ^a   Choi, S ^a   Kang, H K ^a   Chung, C ^a   more..

^a SAMSUNG Electronics   (South Korea)

^b Grandis Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT SCALING; DATA RETENTION; FREE LAYERS; HIGH THERMAL STABILITY; MGO; PERPENDICULAR MAGNETIC ANISOTROPY; PERPENDICULAR MAGNETIZATION; SWITCHING CURRENTS; TUNNEL BARRIER;

SCALABILITY; THERMODYNAMIC STABILITY;

MAGNETIC DEVICES;

EID: 84866560375     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2012.6242459     Document Type: Conference Paper

References (3)

1. S. Ikeda et al., Nature Mater. 9, 721 (2010).
2. W. Kim et al., IEDM (2011).
3. Y. Kim et al., VLSI (2011).