A novel defect-engineering-based implementation for high-performance multilevel data storage in resistive switching memory

IEEE Transactions on Electron Devices

Volumn 60, Issue 4, 2013, Pages 1379-1383

  Gao, Bin ^a   Chen, Bing ^a   Zhang, Feifei ^a   Liu, Lifeng ^a   Liu, Xiaoyan ^a   Kang, Jinfeng ^a   Yu, Hongyu ^b   Yu, Bin ^c  

^a PEKING UNIVERSITY   (China)

^b SOUTHERN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (China)

^c STATE UNIVERSITY OF NEW YORK   (United States)

Author keywords

Multilevel; nonvolatile memory; oxygen vacancy; resistive random access memory (RRAM); resistive switching

Indexed keywords

CONDUCTING FILAMENT; MEMORY PERFORMANCE; MULTILEVEL; NON-VOLATILE MEMORY; RESISTIVE RANDOM ACCESS MEMORY (RRAM); RESISTIVE SWITCHING; RESISTIVE SWITCHING MEMORY; SWITCHING OPERATIONS;

DATA STORAGE EQUIPMENT; DEFECTS; HAFNIUM OXIDES; OXYGEN VACANCIES; RANDOM ACCESS STORAGE; SWITCHING; SWITCHING SYSTEMS;

NONVOLATILE STORAGE;

EID: 84875494362     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2013.2245508     Document Type: Article

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