Probabilistic design methodology to improve run-time stability and performance of STT-RAM caches

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2012, Pages 88-94

  Bi, Xiuyuan ^a   Sun, Zhenyu ^a   Li, Hai ^a   Wu, Wenqing ^b  

^a POLYTECHNIC UNIVERSITY   (United States)

^b QUALCOMM INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BLOCK CODES; COMPUTER AIDED DESIGN; ENERGY UTILIZATION; FAILURE ANALYSIS; OUTAGES; RANDOM PROCESSES; STOCHASTIC SYSTEMS;

HARDWARE COMPLEXITY; LEAKAGE POWER CONSUMPTION; PROBABILISTIC DESIGN; PROBABILISTIC DESIGN METHODOLOGY; SCALED TECHNOLOGIES; SPIN-TRANSFER TORQUE RANDOM ACCESS MEMORY (STT-RAM); STOCHASTIC SWITCHING; THERMAL FLUCTUATIONS;

RANDOM ACCESS STORAGE;

EID: 84872313559     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2429384.2429401     Document Type: Conference Paper

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