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Volumn 52, Issue 6, 2008, Pages 623-634

Thermomechanical modeling of 3D electronic packages

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING;

EID: 61649098652     PISSN: 00188646     EISSN: 00188646     Source Type: Journal    
DOI: 10.1147/JRD.2008.5388568     Document Type: Article
Times cited : (68)

References (12)
  • 1
    • 25844453501 scopus 로고    scopus 로고
    • Development of Next-Generation System-on-Package (SOP) Technology Based on Silicon Carriers with Fine-Pitch Chip Interconnection
    • J. U. Knickerbocker, P. S. Andry, L. P. Buchwalter, A. Deutsch, R. R. Horton, K. A. Jenkins, Y. H. Kwark, et al., "Development of Next-Generation System-on-Package (SOP) Technology Based on Silicon Carriers with Fine-Pitch Chip Interconnection," IBM J. Res. & Dev. 49, No. 4/5, 725-753 (2005).
    • (2005) IBM J. Res. & Dev , vol.49 , Issue.4-5 , pp. 725-753
    • Knickerbocker, J.U.1    Andry, P.S.2    Buchwalter, L.P.3    Deutsch, A.4    Horton, R.R.5    Jenkins, K.A.6    Kwark, Y.H.7
  • 2
    • 85036813918 scopus 로고    scopus 로고
    • H. B. Bakoglu, Circuits, Interconnections, and Packaging for VLSI, Addison-Wesley Publishing Co., Inc., Reading, MA, 1990.
    • H. B. Bakoglu, Circuits, Interconnections, and Packaging for VLSI, Addison-Wesley Publishing Co., Inc., Reading, MA, 1990.
  • 5
    • 33947360666 scopus 로고    scopus 로고
    • Miss Rate Prediction Across Program Inputs and Cache Configurations
    • Y. Zhong, S. G. Dropsho, X. Shen, A. Studer, and C. Ding, "Miss Rate Prediction Across Program Inputs and Cache Configurations," Trans. Computers 56, No. 3, 328-343 (2007).
    • (2007) Trans. Computers , vol.56 , Issue.3 , pp. 328-343
    • Zhong, Y.1    Dropsho, S.G.2    Shen, X.3    Studer, A.4    Ding, C.5
  • 10
    • 61649112824 scopus 로고    scopus 로고
    • Method and System for Real-time Estimation and Prediction of Thermal State of a Microprocessor Unit,
    • U.S. Patent Application No. /0013281A1, January 19, 2006
    • S. Sri-Jayantha, H. Dang, and A. Sharma, "Method and System for Real-time Estimation and Prediction of Thermal State of a Microprocessor Unit," U.S. Patent Application No. 2006/0013281A1, January 19, 2006.
    • (2006)
    • Sri-Jayantha, S.1    Dang, H.2    Sharma, A.3
  • 11
    • 61649104215 scopus 로고    scopus 로고
    • Multileveled Printed Circuit Board Unit Including Substrate Interposed between Stacked Bumps,
    • U.S. Patent No, /0017671A1, January 29, 2004
    • S. Masuda, "Multileveled Printed Circuit Board Unit Including Substrate Interposed between Stacked Bumps," U.S. Patent No. 2004 /0017671A1, January 29, 2004.
    • (2004)
    • Masuda, S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.