Zinc and tin-zinc via-filling for the formation of through-silicon vias in a system-in-package

Journal of Electronic Materials

Volumn 38, Issue 5, 2009, Pages 685-690

  Jee, Y K ^a   Yu, J ^a   Park, K W ^b   Oh, T S ^b  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^b Hong Ik University   (South Korea)

Author keywords

Chip stack package; Sn Zn via; System in package; Through silicon via; Zn via

Indexed keywords

CHIP-STACK PACKAGE; SN-ZN VIA; SYSTEM-IN-PACKAGE; THROUGH-SILICON VIA; ZN VIA;

CELLULAR RADIO SYSTEMS; ELECTRIC CONDUCTIVITY; ELECTROCHEMISTRY; ELECTRONICS PACKAGING; FILLING; FLIP CHIP DEVICES; INTERCONNECTION NETWORKS; MELTING POINT; SILICON ALLOYS; SYSTEMS ANALYSIS; TIN; TITANIUM COMPOUNDS;

ZINC;

EID: 62549132454     PISSN: 03615235     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11664-008-0646-6     Document Type: Article

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