Ultrafine pitch (67 μm) of recessed and bonded Cu-Cu interconnects by three-dimensional wafer stacking

IEEE Electron Device Letters

Volumn 33, Issue 12, 2012, Pages 1747-1749

  Peng, Lan ^a,b   Zhang, Lin ^a,b   Fan, Ji ^b   Li, Hong Yu ^a   Lim, Dau Fatt ^b   Tan, Chuan Seng ^b  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

^b NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

3 D integrated circuit (IC); Cu Cu bonding; fine pitch; hermetic seal; wafer to wafer (W2W)

Indexed keywords

3-D INTEGRATED CIRCUIT; BONDED STRUCTURE; CU SURFACES; DAISY CHAIN STRUCTURE; FINE PITCH; HERMETICITY; HIGH BANDWIDTH; LOW-TEMPERATURE BONDING PROCESS; THERMAL CYCLING TEST; THERMO COMPRESSION BONDING; ULTRA FINE PITCH; WAFER STACKING; WAFER-LEVEL INTEGRATION; WAFER-TO-WAFER (W2W);

BONDING; HERMETIC SEALS; INTEGRATED CIRCUITS; MONOLAYERS;

WAFER BONDING;

EID: 84870408975     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2012.2218273     Document Type: Article

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