Low temperature Cu-to-Cu bonding for wafer-level hermetic encapsulation of 3D microsystems

Electrochemical and Solid-State Letters

Volumn 14, Issue 11, 2011, Pages

  Fan, J ^a,b   Lim, D F ^b   Peng, L ^b   Li, K H ^c   Tan, C S ^a,b  

^a RESEARCH TECHNO PLAZA   (Singapore)

^b NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^c NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

3-D MICROSYSTEMS; BARRIER LAYERS; BONDING FORCES; BONDING LAYERS; BONDING MEDIUM; HELIUM LEAK RATE; HERMETIC SEALING; HERMETICITY; LOW TEMPERATURES; MEASUREMENT RESULTS; MICROELECTRONICS PACKAGING; MIL-STD-883E; NON-FUNCTIONAL; SEAL RINGS; SEALING APPLICATIONS; SINGLE-RING STRUCTURES; THERMO COMPRESSION BONDING; WAFER LEVEL;

ELECTRONICS PACKAGING; HELIUM; MICROELECTRONICS; SEALS;

WAFER BONDING;

EID: 80053549618     PISSN: 10990062     EISSN: None     Source Type: Journal    
DOI: 10.1149/2.025111esl     Document Type: Article

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