-
1
-
-
35748965560
-
The emergence of spin electronics in data storage
-
C. Chappert, A. Fert, F. Nguyen Van Dau,"The emergence of spin electronics in data storage", Nat. Mat., Vol. 6, pp. 813-823, 2007.
-
(2007)
Nat. Mat.
, vol.6
, pp. 813-823
-
-
Chappert, C.1
Fert, A.2
Van Dau Nguyen, F.3
-
2
-
-
19944431328
-
A 4-Mb toggle MRAM based on a novel bit and switching method
-
B. Engel et aI.,"A 4-Mb toggle MRAM based on a novel bit and switching method", IEEE Trans. Magn., Vol. 41, pp. 132-136,2005.
-
(2005)
IEEE Trans. Magn.
, vol.41
, pp. 132-136
-
-
Engel Et Ai, B.1
-
3
-
-
70449421590
-
Spin transfer torque (STT)-MRAM based run time reconfiguration FPGA circuit
-
article 14
-
W. S. Zhao et aI.,"Spin Transfer Torque (STT)-MRAM based Run Time Reconfiguration FPGA circuit", ACM Trans. Embedded Computing Systems, Vol. 9, no. 2, article 14,2009.
-
(2009)
ACM Trans. Embedded Computing Systems
, vol.9
, Issue.2
-
-
Zhao Et Ai, W.S.1
-
4
-
-
60449095985
-
Power and area optimization for run-time reconfiguration system on programmable chip based on magnetic random access memory
-
W. S. Zhao, et aI.,"Power and Area Optimization for Run-Time Reconfiguration System on Programmable Chip Based on Magnetic Random Access Memory", IEEE Trans. Magn., 45, pp. 776-780, 2009.
-
(2009)
IEEE Trans. Magn.
, vol.45
, pp. 776-780
-
-
Zhao, W.S.1
-
6
-
-
79951480054
-
Programmable nanowire circuits for nanoprocessors
-
H. Van et aI.,"Programmable nanowire circuits for nanoprocessors", Nat., Vo1. 470, pp. 240-244, 2011.
-
(2011)
Nat.
, vol.470
, pp. 240-244
-
-
Et H.Van1
-
7
-
-
77049110379
-
2-terminal carbon nanotube programmable devices for adaptive architectures
-
G. Agnus et aI.,"2-Terminal Carbon Nanotube Programmable devices for adaptive architectures". Advanced Materials, Vol. 22, pp. 702-706, 2010.
-
(2010)
Advanced Materials
, vol.22
, pp. 702-706
-
-
Agnus, G.1
-
8
-
-
77950852717
-
Memristive' switches enable 'stateful' logic operations via material implication
-
J. Borghetti, et aI.,"Memristive' switches enable 'stateful' logic operations via material implication". Nat., Vol. 464, pp. 873-876, 2010.
-
(2010)
Nat.
, vol.464
, pp. 873-876
-
-
Borghetti, J.1
-
9
-
-
77953859602
-
Magnonic logic circuits
-
A. Khitun, M. Bao and K. L. Wang,"Magnonic logic circuits", J. Phys. D: Appl. Phys., Vol. 43,264005,2010.
-
(2010)
J. Phys. D: Appl. Phys.
, vol.43
, pp. 264005
-
-
Khitun, A.1
Bao, M.2
Wang, K.L.3
-
10
-
-
62449267288
-
A three-terminal approach to developing SpinTorque written magnetic random access memory cells
-
P. M. Braganca et aI.,"A three-terminal approach to developing SpinTorque written magnetic Random Access Memory Cells", IEEE Trans. Nanotech., Vol. 8, pp. 190-195,2010.
-
(2010)
IEEE Trans. Nanotech.
, vol.8
, pp. 190-195
-
-
Braganca Et Ai, P.M.1
-
11
-
-
84866608146
-
-
International Roadmap for Semiconductor (ITRS) , ERD update
-
International Roadmap for Semiconductor (ITRS) 2007, ERD update.
-
(2007)
-
-
-
12
-
-
84866632143
-
-
Spartan Family
-
Spartan Family, www. xilinx. com
-
-
-
-
13
-
-
78149253543
-
Low power, high reliability magnetic flip-flop
-
Y. Lakys et aI.,"Low power, high reliability magnetic flip-flop", Electronics letters, Vol. 46, pp. 1493-1494,2010.
-
(2010)
Electronics Letters
, vol.46
, pp. 1493-1494
-
-
Lakys Et Ai, Y.1
-
14
-
-
4344644019
-
CMOS-like logic in defective nanoscale crossbars
-
G. Snider, P. Kuekes and R. S. Williams,"CMOS-like logic in defective nanoscale crossbars" IEEE Trans. Nanotech., Vol. 15, pp. 881-891,2005.
-
(2005)
IEEE Trans. Nanotech.
, vol.15
, pp. 881-891
-
-
Snider, G.1
Kuekes, P.2
Williams, R.S.3
-
15
-
-
14744299125
-
The design and implementation of a context switching FPGA
-
S. M. Scalera and J. R Vazquez,"The design and implementation of a context switching FPGA", Proc. IEEE-FCCM, pp. 78-85,1998.
-
(1998)
Proc. IEEE-FCCM
, pp. 78-85
-
-
Scalera, S.M.1
Vazquez, J.R.2
-
16
-
-
80052925386
-
Design considerations and strategies for high-reliable STT-MRAM
-
W. S. Zhao et aI.,"Design considerations and strategies for high-reliable STT-MRAM", Microelectron. Rehab., Vo1. 51, pp. 1454-1458,2011.
-
(2011)
Microelectron. Rehab.
, vol.51
, pp. 1454-1458
-
-
Zhao Et Ai, W.S.1
-
17
-
-
77951622926
-
Complementary resistive switches for passive nanocrossbar memories
-
E. Linn et aI.,"Complementary resistive switches for passive nanocrossbar memories", Nat. Mat., Vol. 9, pp. 403-406, 2010.
-
(2010)
Nat. Mat.
, vol.9
, pp. 403-406
-
-
Linn Et Ai, E.1
-
18
-
-
70350616352
-
High speed, high stability and low power sensing amplifier for MTJ/CMOS hybrid logic circuits
-
W. S. Zhao, C. Chappert, V. Javerliac and J. P. Noziere,"High Speed, High Stability and Low Power Sensing Amplifier for MTJ/CMOS Hybrid Logic Circuits", IEEE Trans. on Mag., Vol. 45, pp. 3784-3787,2009.
-
(2009)
IEEE Trans. on Mag.
, vol.45
, pp. 3784-3787
-
-
Zhao, W.S.1
Chappert, C.2
Javerliac, V.3
Noziere, J.P.4
-
20
-
-
73849144542
-
Dynamic compact model of thermally assisted switching magnetic tunnel junctions
-
M. Elbaraji, et aI.,"Dynamic compact model of thermally assisted switching magnetic tunnel junctions", J. Appl. Phys., 123906,2010.
-
(2010)
J. Appl. Phys.
, pp. 123906
-
-
Elbaraji, M.1
-
21
-
-
78349261547
-
Self-adaptive write circuit for low-power and variation tolerant memristors
-
K. Jo et aI.,"Self-Adaptive Write Circuit for Low-Power and VariationTolerant Memristors", IEEE Trans. Nanotech. Vo1. 9, pp. 675-678, 2010.
-
(2010)
IEEE Trans. Nanotech
, vol.9
, pp. 675-678
-
-
Jo Et Ai, K.1
-
22
-
-
79955408773
-
A compact model of domain wall propagation for logic and memory design
-
WS. Zhao et aI.,"A Compact Model of Domain Wall propagation for logic and memory design" , J. Appl. Phys. Vo1. 109, 07D501, 2011.
-
(2011)
J. Appl. Phys
, vol.109
-
-
Zhao Et Ai, W.S.1
-
23
-
-
62249137762
-
Large voltage-induced magnetic anisotropy change in a few atomic layers of iron
-
T. Maruyama et aI.,"Large voltage-induced magnetic anisotropy change in a few atomic layers of iron", Nat. Nano., Vol. 4, pp. 158-161,2009.
-
(2009)
Nat. Nano.
, vol.4
, pp. 158-161
-
-
Maruyama Et Ai, T.1
-
24
-
-
57649087959
-
Fabrication of a nonvolatile full adder based on logic-in-memory architecture using magnetic tunnel junctions
-
S. Matsunaga et aI.,"Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions", Appl. Phys. Express, Vol. I, pp. 091301,2008.
-
(2008)
Appl. Phys. Express
, vol.1
, pp. 091301
-
-
Matsunaga Et Ai, S.1
-
25
-
-
0031346317
-
A time multi plexed FPGA
-
S. Trimberger, D. Carberry, A. Johnson and J. Wong,"A TimeMultiplexed FPGA", Proc. of The 5th Annual IEEE Symp. on FPGAs for Custom Computing Machines, pp. 22-28 ,1997.
-
(1997)
Proc. of the 5th Annual IEEE Symp. on FPGAs for Custom Computing Machines
, pp. 22-28
-
-
Trimberger, S.1
Carberry, D.2
Johnson, A.3
Wong, J.4
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