Self-aligned multi-channel silicon nanowire field-effect transistors

Solid-State Electronics

Volumn 78, Issue , 2012, Pages 92-96

  Zhu, Hao ^a,b   Li, Qiliang ^a,b   Yuan, Hui ^a,b   Baumgart, Helmut ^c   Ioannou, Dimitris E ^a   Richter, Curt A ^b  

^a George Mason University   (United States)

^b NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

^c Old Dominion University   (United States)

Author keywords

Multi channel nanowire FET; Nanowire field effect transistor; Self alignment; Voltage tolerance

Indexed keywords

DEVICE PROPERTIES; DEVICE STRUCTURES; DIRECTED ASSEMBLY; ELECTRICAL CHARACTERISTIC; EXCELLENT PERFORMANCE; GATE LENGTH; MULTI-CHANNEL; NANOWIRE FET; ON/OFF RATIO; PHOTOLITHOGRAPHIC PROCESS; SCHOTTKY BARRIERS; SELF ALIGNMENT; SELF-ALIGNED; SELF-ALIGNMENT PROCESS; SENSOR APPLICATIONS; SI NANOWIRE; SILICON NANOWIRE FIELD-EFFECT TRANSISTORS; SOURCE AND DRAINS; SUBTHRESHOLD SLOPE; VOLTAGE TOLERANCES;

ALIGNMENT; FIELD EFFECT TRANSISTORS; PHOTOLITHOGRAPHY; SCHOTTKY BARRIER DIODES;

NANOWIRES;

EID: 84866086423     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2012.05.058     Document Type: Conference Paper

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