BulkCompiler: High-performance sequential consistency through cooperative compiler and hardware support

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn , Issue , 2009, Pages 133-144

  Ahn, W ^a   Qi, S ^a   Nicolaides, M ^a   Torrellas, J ^a   Lee, J W ^b   Fang, X ^b   Midkiff, S ^b   Wong, David ^c  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b PURDUE UNIVERSITY   (United States)

^c INTEL CORPORATION   (United States)

Author keywords

Atomic region; Chunk based architecture; Compiler optimization; Sequential consistency

Indexed keywords

ATOMIC REGION; ATOMIC REGIONS; CODE OPTIMIZATION; COMPILER OPTIMIZATIONS; GROUP FORMATIONS; HARDWARE ARCHITECTURE; HARDWARE SUPPORTS; JAVA MEMORY MODEL; SEQUENTIAL CONSISTENCY; SIMULATION RESULT; SOFTWARE ALGORITHMS;

COMPUTER SOFTWARE; HARDWARE; JAVA PROGRAMMING LANGUAGE; OPTIMIZATION;

PROGRAM COMPILERS;

EID: 76749165809     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1669112.1669131     Document Type: Conference Paper

References (33)

1. S. V. Adve and K. Gharachorloo. Shared Memory Consistency Models: A Tutorial. Western Reseach Laboratory-Compaq. Research Report 95/7, September 1995.
2. E. Berk. JLex: A Lexical Analyzer Generator for Java. http://www.cs.princeton.edu/~appel/modern/java/JLex/.
3. C. Blundell, M. M. Martin, and T. F. Wenisch. InvisiFence: Performance-Transparent Memory Ordering in Conventional Multiprocessors. In International Symposium on Computer Architecture, June 2009.
4. H. Cain and M. Lipasti. Memory Ordering: A Value-Based Approach. In International Symposium on Computer Architecture, June 2004.
5. B. Carlstrom et al. Transactional Execution of Java Programs. In Workshop on Synchronization and Concurrency in Object-Oriented Languages, October 2005.
6. L. Ceze, J. Tuck, P. Montesinos, and J. Torrellas. BulkSC: Bulk Enforcement of Sequential Consistency. In International Symposium on Computer Architecture, June 2007.
7. S. Chaudhry et al. Simultaneous Speculative Threading: A Novel Pipeline Architecture Implemented in Sun's ROCK Processor. In International Symposium on Computer Architecture, June 2009.
8. J. Dehnert et al. The Transmeta Code Morphing Software: Using Speculation, Recovery, and Adaptive Retranslation to Address Real-Life Challenges. In International Symposium on Code Generation and Optimization, March 2003.
9. D. Dice et al. Applications of the Adaptive Transactional Memory Test Platform. In Workshop on Transactional Computing, February 2008.
10. X. Fang, J. Lee, and S. P. Midkiff. Automatic Fence Insertion for Shared Memory Multiprocessing. In International Conference on Supercomputing, June 2003.
11. C. Gniady, B. Falsafi, and T. N. Vijaykumar. Is SC + ILP = RC? In International Symposium on Computer Architecture, May 1999.
12. L. Hammond, V. Wong, M. Chen, B. D. Carlstrom, J. D. Davis, B. Hertzberg, M. K. Prabhu, H. Wijaya, C. Kozyrakis, and K. Olukotun. Transactional Memory Coherence and Consistency. In International Symposium on Computer Architecture, June 2004.
13. A. Kamil, J. Su, and K. A. Yelick. Making Sequential Consistency Practical in Titanium. In International Conference on Supercomputing, November 2005.
14. A. Krishnamurthy and K. A. Yelick. Analyses and Optimizations for Shared Address Space Programs. Journal of Parallel and Distributed Computing, November 1996.
15. L. Lamport. How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs. IEEE Transactions on Computers, September 1979.
16. K. Lee and S. P. Midkiff. A Two-Phase Escape Analysis for Parallel Java Programs. In International Conference on Parallel Architectures and Compilation Techniques, September 2006.
17. B. Liblit, A. Aiken, and K. A. Yelick. Type Systems for Distributed Data Sharing. In International Static Analysis Symposium, June 2003.
18. M. Martin, C. Blundell, and E. Lewis. Subtleties of Transactional Memory Atomicity Semantics. IEEE Computer Architecture Letters, July 2006.
19. M. Musuvathi and S. Qadeer. Iterative Context Bounding for Systematic Testing of Multithreaded Programs. In International Symposium on Programming Language Design and Implementation, June 2007.
20. G. Naumovich and G. Avrunin. A Conservative Data Flow Algorithm for Detecting All Pairs of Statements that May Happen in Parallel. In International Symposium on Foundations of Software Engineering, November 1998.
21. N. Neelakantam, R. Rajwar, S. Srinivas, U. Srinivasan, and C. Zilles. Hardware Atomicity for Reliable Software Speculation. In International Symposium on Computer Architecture, June 2007.
22. M. Paleczny, C. Vick, and C. Click. The Java HotspotTM Server Compiler. In Symposium on JavaTM Virtual Machine Research and Technology Symposium, April 2001.
23. R. Rajwar and J. Goodman. Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution. In International Symposium on Microarchitecture, December 2001.
24. C. J. Rossbach, O. S. Hofmann, D. E. Porter, H. E. Ramadan, B. Aditya, and E. Witchel. TxLinux: Using and Managing Hardware Transactional Memory in an Operating System. In Symposium on Operating Systems Principles, October 2007.
25. K. Russell and D. Detlefs. Eliminating Synchronization-Related Atomic Operations with Biased Locking and Bulk Rebiasing. In Conference on Object-Oriented Programming Systems, Languages, and Applications, October 2006.
26. D. Shasha and M. Snir. Efficient and Correct Execution of Parallel Programs that Share Memory. Transactions on Programming Languages and Systems, April 1988.
27. Sun Microsystems. OpenJDK. http://openjdk.java.net/.
28. Z. Sura, X. Fang, C.-L. Wong, S. P. Midkiff, J. Lee, and D. Padua. Compiler Techniques for High Performance Sequentially Consistent Java Programs. In Symposium on Principles and Practice of Parallel Programming, June 2005.
29. E. Vallejo, M. Galluzzi, A. Cristal, F. Vallejo, R. Beivide, P. Stenstrom, J. Smith, and M. Valero. Implementing Kilo-Instruction Multiprocessors. International Conference on Pervasive Services, July 2005.
30. Virtutech. Simics. http://www.simics.net/.
31. C. von Praun and T. R. Gross. Static Conflict Analysis for Multi-Threaded Object-Oriented Programs. In Conference on Programming Language Design and Implementation, June 2003.
32. T. F. Wenisch, A. Ailamaki, B. Falsafi, and A. Moshovos. Mechanisms for Store-Wait-Free Multiprocessors. In International Symposium on Computer Architecture, June 2007.
33. L. Ziarek et al. A Uniform Transactional Execution Environment for Java. In European Conference on Object-Oriented Programming, July 2008.