HARAQ: Congestion-aware learning model for highly adaptive routing algorithm in on-chip networks

Proceedings of the 2012 6th IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2012

Volumn , Issue , 2012, Pages 19-26

  Ebrahimi, Masoumeh ^a   Daneshtalab, Masoud ^a   Farahnakian, Fahimeh ^a   Plosila, Juha ^a   Liljeberg, Pasi ^a   Palesi, Maurizio ^b   Tenhunen, Hannu ^a  

^a UNIVERSITY OF TURKU   (Finland)

^b University of Kore   (Italy)

Author keywords

Adaptive Routing; Networks on chip; Non Minimal Routing Algorithm; Q Learning Methods

Indexed keywords

ADAPTIVE ROUTING; ADAPTIVE ROUTING ALGORITHM; ALTERNATIVE PATH; CONGESTED PATHS; CONGESTION CONDITIONS; CONGESTION-AWARE; LEARNING METHODS; LEARNING MODELS; MESH TOPOLOGIES; MESSAGE LATENCY; NETWORKS ON CHIPS; ON-CHIP NETWORKS; OUTPUT CHANNELS; Q-LEARNING METHOD; ROUTE MESSAGES; SHORTEST PATH; SINGLE CHANNELS; TWO DIRECTIONS;

ALGORITHMS; LEARNING SYSTEMS; MICROPROCESSOR CHIPS;

ROUTING ALGORITHMS;

EID: 84862726803     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NOCS.2012.10     Document Type: Conference Paper

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