DBAR: An efficient routing algorithm to support multiple concurrent applications in networks-on-chip

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2011, Pages 413-424

  Ma, Sheng ^a   Jerger, Natalie Enright ^b   Wang, Zhiying ^a  

^a NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY   (China)

^b UNIVERSITY OF TORONTO   (Canada)

Author keywords

Networks on chip; Routing algorithm; Workload consolidation

Indexed keywords

ADAPTIVE ROUTING; ADAPTIVE ROUTING ALGORITHM; ADAPTIVITY; CONGESTION PROPAGATION; DYNAMIC ISOLATION; EFFICIENT ROUTING; ENERGY DELAY PRODUCT; HIGH INJECTION; MANY-CORE ARCHITECTURE; MULTIPLE APPLICATIONS; NEIGHBORING NODES; NETWORK CONGESTIONS; NETWORK INFORMATION; NETWORK STATUS; NETWORKS ON CHIPS; NONLOCAL; OUTPUT PORTS; SELECTION FUNCTION; WORKLOAD CONSOLIDATION;

ADAPTIVE ALGORITHMS; COMPUTER ARCHITECTURE; NETWORK ARCHITECTURE; ROUTING ALGORITHMS;

NETWORK ROUTING; ROUTING ALGORITHMS;

EID: 80052533252     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2000064.2000113     Document Type: Conference Paper

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