-
2
-
-
47249127725
-
The case for energy-proportional computing
-
L. A. Barroso and U. Hölzle, "The case for energy-proportional computing," Computer, vol. 40, pp. 33-37, 2007.
-
(2007)
Computer
, vol.40
, pp. 33-37
-
-
Barroso, L.A.1
Hölzle, U.2
-
3
-
-
79952804640
-
Investigating the potential of application-centric aggressive power management for hpc workloads
-
I. Rodero, S. Chandra, M. Parashar, R. Muralidhar, H. Seshadri, and S. Poole, "Investigating the potential of application-centric aggressive power management for hpc workloads," in 17th International Confer-ence on High Performance Computing (HiPC), 2010, pp. 1-10.
-
(2010)
17th International Confer-ence on High Performance Computing (HiPC)
, pp. 1-10
-
-
Rodero, I.1
Chandra, S.2
Parashar, M.3
Muralidhar, R.4
Seshadri, H.5
Poole, S.6
-
4
-
-
85168582169
-
-
Jedec. ddr3 sdram standard 2009
-
"Jedec. ddr3 sdram standard," 2009.
-
-
-
-
5
-
-
85168577250
-
-
Micron Calculating memory system power for ddr3 July 2007
-
Micron, "Calculating memory system power for ddr3," July 2007.
-
-
-
-
6
-
-
84949782501
-
Energy-efficient server clusters
-
E. N. Elnozahy, M. Kistler, and R. Rajamony, "Energy-efficient server clusters," in 2nd international conference on Power-aware computer systems, 2003, pp. 179-197.
-
(2003)
2nd International Conference on Power-aware Computer Systems
, pp. 179-197
-
-
Elnozahy, E.N.1
Kistler, M.2
Rajamony, R.3
-
7
-
-
33845438524
-
Just in time dynamic voltage scaling: Exploiting inter-node slack to save energy in MPI programs
-
N. Kappiah, V. W. Freeh, and D. K. Lowenthal, "Just in time dynamic voltage scaling: exploiting inter-node slack to save energy in MPI programs," in ACM/IEEE conference on Supercomputing (SC), 2005, p. 33.
-
(2005)
ACM/IEEE Conference on Supercomputing (SC)
, pp. 33
-
-
Kappiah, N.1
Freeh, V.W.2
Lowenthal, D.K.3
-
8
-
-
33845388509
-
Performance-constrained distributed dvs scheduling for scientific applications on power-aware clusters
-
R. Ge, X. Feng, and K. W. Cameron, "Performance-constrained distributed dvs scheduling for scientific applications on power-aware clusters," in ACM/IEEE conference on Supercomputing (SC), 2005, p. 34.
-
(2005)
ACM/IEEE Conference on Supercomputing (SC)
, pp. 34
-
-
Ge, R.1
Feng, X.2
Cameron, K.W.3
-
9
-
-
0029488569
-
A scheduling model for reduced cpu energy
-
F. Yao, A. Demers, and S. Shenker, "A scheduling model for reduced cpu energy," in 36th Annual Symposium on Foundations of Computer Science, 1995, p. 374.
-
(1995)
36th Annual Symposium on Foundations of Computer Science
, pp. 374
-
-
Yao, F.1
Demers, A.2
Shenker, S.3
-
10
-
-
0043237598
-
Scheduling with dynamic voltage/speed adjustment using slack reclamation in multiprocessor realtime systems
-
July
-
D. Zhu, R. Melhem, and B. R. Childers, "Scheduling with dynamic voltage/speed adjustment using slack reclamation in multiprocessor realtime systems," IEEE Trans. Parallel Distrib. Syst., vol. 14, July 2003.
-
(2003)
IEEE Trans. Parallel Distrib. Syst.
, vol.14
-
-
Zhu, D.1
Melhem, R.2
Childers, B.R.3
-
11
-
-
63549151745
-
Meeting points: Using thread criticality to adapt multicore hardware to parallel regions
-
Q. Cai, J. González, R. Rakvic, G. Magklis, P. Chaparro, and A. González, "Meeting points: using thread criticality to adapt multicore hardware to parallel regions," in International Conference on Parallel Architectures and Compilation Techniques, 2008, pp. 240-249.
-
(2008)
International Conference on Parallel Architectures and Compilation Techniques
, pp. 240-249
-
-
Cai, Q.1
González, J.2
Rakvic, R.3
Magklis, G.4
Chaparro, P.5
González, A.6
-
12
-
-
0035511102
-
Hardware and software techniques for controlling DRAM power modes
-
DOI 10.1109/12.966492
-
V. Delaluz, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam, and M. J. Irwin, "Hardware and Software Techniques for Controlling DRAM Power Modes," IEEE Trans. Comput., vol. 50, no. 11, pp. 1154-1173, 2001. (Pubitemid 33149145)
-
(2001)
IEEE Transactions on Computers
, vol.50
, Issue.11
, pp. 1154-1173
-
-
Delaluz, V.1
Kandemir, M.2
Vijaykrishnan, N.3
Sivasubramaniam, A.4
Irwin, M.J.5
-
13
-
-
0034592555
-
Energyoriented compiler optimizations for partitioned memory architectures
-
V. Delaluz, M. Kandemir, N. Vijaykrishnan, and M. J. Irwin, "Energyoriented compiler optimizations for partitioned memory architectures," in International conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES'00), 2000, pp. 138-147.
-
(2000)
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES'00)
, pp. 138-147
-
-
Delaluz, V.1
Kandemir, M.2
Vijaykrishnan, N.3
Irwin, M.J.4
-
14
-
-
0036059441
-
Automatic data migration for reducing energy consumption in multi-bank memory systems
-
V. Delaluz, M. Kandemir, and I. Kolcu, "Automatic data migration for reducing energy consumption in multi-bank memory systems," in 39th Design Automation Conference (DAC'02), 2002, pp. 213-218.
-
(2002)
39th Design Automation Conference (DAC'02)
, pp. 213-218
-
-
Delaluz, V.1
Kandemir, M.2
Kolcu, I.3
-
15
-
-
0036049630
-
Scheduler-based DRAM energy management
-
V. Delaluz, A. Sivasubramaniam, M. Kandemir, N. Vijaykrishnan, and M. J. Irwin, "Scheduler-based DRAM energy management," in 39th Design Automation Conference (DAC'02), 2002, pp. 697-702.
-
(2002)
39th Design Automation Conference (DAC'02)
, pp. 697-702
-
-
Delaluz, V.1
Sivasubramaniam, A.2
Kandemir, M.3
Vijaykrishnan, N.4
Irwin, M.J.5
-
16
-
-
16244385916
-
Memory-aware energy-optimal frequency assignment for dynamic supply voltage scaling
-
14.3, Proceedings of the 2004 International Symposium on Lower Power Electronics and Design, ISLPED'04
-
Y. Cho and N. Chang, "Memory-aware energy-optimal frequency assignment for dynamic supply voltage scaling," in International Symposium on Low Power Electronics and Design (ISLPED'04), 2004, pp. 387-392. (Pubitemid 40454746)
-
(2004)
Proceedings of the 2004 International Symposium on Lower Power Electronics and Design, ISLPED'04
, pp. 387-392
-
-
Cho, Y.1
Chang, N.2
-
17
-
-
0038346237
-
Positional adaptation of processors: Application to energy reduction
-
M. C. Huang, J. Renau, and J. Torrellas, "Positional adaptation of processors: application to energy reduction," in 30th International Symposium on Computer Architecture (ISCA'03), 2003, pp. 157-168.
-
(2003)
30th International Symposium on Computer Architecture (ISCA'03)
, pp. 157-168
-
-
Huang, M.C.1
Renau, J.2
Torrellas, J.3
-
18
-
-
33750082380
-
System level multi-bank main memory configuration for energy reduction
-
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation - 16th International Workshop, PATMOS 2006, Proceedings
-
H. B. Fradj, C. Belleudy, and M. Auguin, "System level multi-bank main memory configuration for energy reduction," in International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2006, pp. 84-94. (Pubitemid 44576854)
-
(2006)
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
, vol.4148
, pp. 84-94
-
-
Fradj, H.B.1
Belleudy, C.2
Auguin, M.3
-
19
-
-
34547977544
-
Multi-bank main memory architecture with dynamic voltage frequency scaling for system energy optimization
-
DOI 10.1109/DSD.2006.68, 1690025, Proceedings of the 9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools, DSD 2006
-
H. B. Fradj, C. Belleudy, and M. Auguin, "Multi-bank main memory architecture with dynamic voltage frequency scaling for system energy optimization," in Euromicro Conference on Digital System Design (DSD), 2006, pp. 89-96. (Pubitemid 47271464)
-
(2006)
Proceedings of the 9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools, DSD 2006
, pp. 89-96
-
-
Ben Fradj, H.1
Belleudy, C.2
Auguin, M.3
-
20
-
-
12344269160
-
Performance directed energy management for main memory and disks
-
X. Li, Z. Li, F. David, P. Zhou, Y. Zhou, S. Adve, and S. Kumar, "Performance directed energy management for main memory and disks," in 11th International conference on Architectural support for programming languages and operating systems, 2004, pp. 271-283.
-
(2004)
11th International Conference on Architectural Support for Programming Languages and Operating Systems
, pp. 271-283
-
-
Li, X.1
Li, Z.2
David, F.3
Zhou, P.4
Zhou, Y.5
Adve, S.6
Kumar, S.7
-
21
-
-
85013771039
-
Performance directed energy management for main memory and disks
-
X. Li, Z. Li, Y. Zhou, and S. Adve, "Performance directed energy management for main memory and disks," ACM Transactions on Storage, vol. 1, no. 3, pp. 346-380, 2005.
-
(2005)
ACM Transactions on Storage
, vol.1
, Issue.3
, pp. 346-380
-
-
Li, X.1
Li, Z.2
Zhou, Y.3
Adve, S.4
-
22
-
-
85013786846
-
Cross-component energy management: Joint adaptation of processor and memory
-
X. Li, R. Gupta, S. V. Adve, and Y. Zhou, "Cross-component energy management: joint adaptation of processor and memory," ACM Trans. Archit. Code Optim., vol. 4, no. 3, p. 14, 2007.
-
(2007)
ACM Trans. Archit. Code Optim.
, vol.4
, Issue.3
, pp. 14
-
-
Li, X.1
Gupta, R.2
Adve, S.V.3
Zhou, Y.4
-
23
-
-
35348903171
-
Limiting the power consumption of main memory
-
DOI 10.1145/1250662.1250699, ISCA'07: 34th Annual International Symposium on Computer Architecture, Conference Proceedings
-
B. Diniz, D. Guedes, W. Meira, Jr., and R. Bianchini, "Limiting the power consumption of main memory," in 34th International Symposium on Computer Architecture (ISCA'07), 2007, pp. 290-301. (Pubitemid 47582111)
-
(2007)
Proceedings - International Symposium on Computer Architecture
, pp. 290-301
-
-
Diniz, B.1
Guedes, D.2
Meira Jr., W.3
Bianchini, R.4
-
25
-
-
70450284743
-
Decoupled dimm: Building high-bandwidth memory system using low-speed dram devices
-
H. Zheng, J. Lin, Z. Zhang, and Z. Zhu, "Decoupled dimm: building high-bandwidth memory system using low-speed dram devices," in 36th International symposium on Computer architecture, 2009, pp. 255-266.
-
(2009)
36th International Symposium on Computer Architecture
, pp. 255-266
-
-
Zheng, H.1
Lin, J.2
Zhang, Z.3
Zhu, Z.4
-
26
-
-
66749162556
-
Mini-rank: Adaptive dram architecture for improving memory power efficiency
-
H. Zheng, J. Lin, Z. Zhang, E. Gorbatov, H. David, and Z. Zhu, "Mini-rank: Adaptive dram architecture for improving memory power efficiency," in 41st IEEE/ACM International Symposium on Microarchi-tecture, 2008, pp. 210-221.
-
(2008)
41st IEEE/ACM International Symposium on Microarchi-tecture
, pp. 210-221
-
-
Zheng, H.1
Lin, J.2
Zhang, Z.3
Gorbatov, E.4
David, H.5
Zhu, Z.6
-
27
-
-
77954989143
-
Rethinking dram design and organization for energy-constrained multi-cores
-
A. N. Udipi, N. Muralimanohar, N. Chatterjee, R. Balasubramonian, A. Davis, and N. P. Jouppi, "Rethinking dram design and organization for energy-constrained multi-cores," in 37th International symposium on Computer architecture, 2010, pp. 175-186.
-
(2010)
37th International Symposium on Computer Architecture
, pp. 175-186
-
-
Udipi, A.N.1
Muralimanohar, N.2
Chatterjee, N.3
Balasubramonian, R.4
Davis, A.5
Jouppi, N.P.6
-
28
-
-
79953071808
-
Memscale: Active low-power modes for main memory
-
Q. Deng, D. Meisner, L. Ramos, T. F. Wenisch, and R. Bianchini, "Memscale: active low-power modes for main memory," in 6th International conference on Architectural support for programming languages and operating systems, 2011, pp. 225-238.
-
(2011)
6th International Conference on Architectural Support for Programming Languages and Operating Systems
, pp. 225-238
-
-
Deng, Q.1
Meisner, D.2
Ramos, L.3
Wenisch, T.F.4
Bianchini, R.5
-
29
-
-
79960158244
-
Memory power management via dynamic voltage/frequency scaling
-
H. David, C. Fallin, E. Gorbatov, U. R. Hanebutte, and O. Mutlu, "Memory power management via dynamic voltage/frequency scaling," in 8th ACM International Conference on Autonomic Computing, 2011, pp. 31-40.
-
(2011)
8th ACM International Conference on Autonomic Computing
, pp. 31-40
-
-
David, H.1
Fallin, C.2
Gorbatov, E.3
Hanebutte, U.R.4
Mutlu, O.5
-
30
-
-
31944440969
-
Pin: Building customized program analysis tools with dynamic instrumentation
-
C. Luk, R. Cohn, R. Muth, H. Patil, A. Klauser, G. Lowney, S. Wallace, V. J. Reddi, , and K. Hazelwood, "Pin: building customized program analysis tools with dynamic instrumentation." ACM SIGPLAN Confer-ence on Programming Language Design and Implementation, 2005.
-
(2005)
ACM SIGPLAN Confer-ence on Programming Language Design and Implementation
-
-
Luk, C.1
Cohn, R.2
Muth, R.3
Patil, H.4
Klauser, A.5
Lowney, G.6
Wallace, S.7
Reddi, V.J.8
Hazelwood, K.9
-
31
-
-
70450235406
-
Scalable support for multithreaded applications on dynamic binary instrumentation systems
-
Dublin, Ireland, June
-
K. Hazelwood, G. Lueck, and R. Cohn, "Scalable support for multithreaded applications on dynamic binary instrumentation systems," in 2009 International Symposium on Memory Management (ISMM), Dublin, Ireland, June 2009, pp. 20-29.
-
(2009)
2009 International Symposium on Memory Management (ISMM)
, pp. 20-29
-
-
Hazelwood, K.1
Lueck, G.2
Cohn, R.3
-
32
-
-
77949710964
-
Cmpsim: A pinbased on-the-fly multi-core cache simulator
-
A. Jaleel, R. S. Cohn, C. keung Luk, and B. Jacob, "Cmpsim: A pinbased on-the-fly multi-core cache simulator," in 4th Annual Workshop on Modeling, Benchmarking and Simulation (MoBS), 2008.
-
(2008)
4th Annual Workshop on Modeling, Benchmarking and Simulation (MoBS)
-
-
Jaleel, A.1
Cohn, R.S.2
Keung Luk, C.3
Jacob, B.4
-
33
-
-
70349169080
-
Cmpschedsim: Evaluating os/cmp interaction on shared cache management
-
J. Moses, K. Aisopos, A. Jaleel, R. Iyer, R. Illikkal, D. Newell, and S. Makineni, "Cmpschedsim: Evaluating os/cmp interaction on shared cache management," in IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2009, pp. 113-122.
-
(2009)
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
, pp. 113-122
-
-
Moses, J.1
Aisopos, K.2
Jaleel, A.3
Iyer, R.4
Illikkal, R.5
Newell, D.6
Makineni, S.7
-
34
-
-
85168615012
-
-
Pagemap-Linux Kernel-Documentation /vm /pagemap.txt January 2011
-
"Pagemap -Linux Kernel -Documentation /vm /pagemap.txt," January 2011.
-
-
-
|