Fully automated, testable design of fine-grained triple mode redundant logic

IEEE Transactions on Nuclear Science

Volumn 58, Issue 6 PART 1, 2011, Pages 3046-3052

  Hindman, Nathan D ^a   Clark, Lawrence T ^a   Patterson, Dan W ^a   Holbert, Keith E ^a  

^a Arizona State University   (United States)

Author keywords

Auto place and route; logic synthesis; radiation hardening by design; standard cell library

Indexed keywords

AUTO-PLACE AND ROUTE; BROAD BEAMS; CLOCK FREQUENCY; CLOCK GATING; DESIGN METHODOLOGY; DESIGN-AUTOMATION TOOLS; HIGH-SPEED; LOGIC SYNTHESIS; LOW POWER; MASTER-SLAVE FLIP-FLOP; RADIATION HARDENED BY DESIGN; RADIATION HARDENING BY DESIGN; SELF-CORRECTION; STANDARD CELL LIBRARY; SUPPLY-VOLTAGE SCALING; TESTABILITY; TESTABLE DESIGN; TRIPLE MODES; TRIPLE MODULAR REDUNDANCY;

AUTOMATION; COMPUTER AIDED DESIGN; ELECTRIC BATTERIES; FAULT TOLERANT COMPUTER SYSTEMS; HARDENING; LOGIC DESIGN; RADIATION HARDENING;

LOGIC CIRCUITS;

EID: 83855165168     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2011.2169280     Document Type: Conference Paper

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