Clock, flip-flop, and combinatorial logic contributions to the SEU cross section in 90 nm ASIC technology

IEEE Transactions on Nuclear Science

Volumn 56, Issue 6, 2009, Pages 3542-3550

  Hansen, David L ^a   Miller, Eric J ^a   Kleinosowski, Aj ^a   Kohnen, Kirk ^a   Le, Anthony ^a   Wong, Dick ^a   Amador, Karina ^a   Baze, Mark ^a   DeSalvo, David ^a   Dooley, Maryanne ^a   Gerst, Kenneth ^a   Hughlock, Barrie ^a   Jeppson, Bradford ^a   Jobe, R D ^a   Nardi, David ^a   Ojalvo, Isabel ^a   Rasmussen, Brad ^a   Sunderland, David ^a   Truong, John ^a   Yoo, Michael ^a   Zayas, E ^a   more..

^a BOEING COMPANY   (United States)

Author keywords

Heavy ion; Rad hard by design; Single event upset

Indexed keywords

90NM CMOS; ASIC TECHNOLOGIES; COMBINATORIAL LOGIC; CROSS SECTION; LOGIC DATA; RAD-HARD BY DESIGNS; SEU CROSS-SECTION; SINGLE EVENT EFFECTS; SINGLE EVENT UPSET; SINGLE EVENT UPSETS; WELL STRUCTURE;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; DESIGN OF EXPERIMENTS; ELECTRIC NETWORK ANALYSIS; ELECTRIC POWER SUPPLIES TO APPARATUS; FLIP FLOP CIRCUITS; HEAVY IONS; INTEGRATED CIRCUITS; TRANSIENTS;

LOGIC CIRCUITS;

EID: 72349090776     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2009.2031972     Document Type: Conference Paper

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