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Volumn , Issue , 2011, Pages 83-92

Resource minimized static mapping and dynamic scheduling of SDF graphs

Author keywords

buffer size minimization; dynamic scheduling; Mapping; parallel execution; SDF graph; throughput

Indexed keywords

AVERAGE THROUGHPUT; BUFFER REQUIREMENTS; BUFFER SIZES; DYNAMIC SCHEDULING; MULTI OBJECTIVE EVOLUTIONARY ALGORITHMS; NP COMPLETE; PARALLEL EXECUTIONS; PRIORITY ASSIGNMENT; RUNTIMES; SDF GRAPH; STATIC MAPPING; STATIC SCHEDULING; SYNCHRONOUS DATA FLOW GRAPHS; TASK EXECUTIONS; THROUGHPUT CONSTRAINTS;

EID: 83755219411     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESTIMedia.2011.6088529     Document Type: Conference Paper
Times cited : (3)

References (27)
  • 1
    • 85032751431 scopus 로고    scopus 로고
    • Multiprocessor SoC design methods and tools
    • Nov.
    • H. Park, H. Oh, and S. Ha, "Multiprocessor SoC design methods and tools," IEEE Signal Processing Magazine, Vol. 26, Issue 6, pp. 72-79, Nov. 2009.
    • (2009) IEEE Signal Processing Magazine , vol.26 , Issue.6 , pp. 72-79
    • Park, H.1    Oh, H.2    Ha, S.3
  • 3
    • 0023138886 scopus 로고
    • Static scheduling of synchronous data flow programs for digital signal processing
    • E. A. Lee and D. G. Messerschmitt, "Static scheduling of synchronous data flow programs for digital signal processing," IEEE Trans. On Comp., Vol. 36, No. 1., pp. 24-35, 1987.
    • (1987) IEEE Trans. on Comp. , vol.36 , Issue.1 , pp. 24-35
    • Lee, E.A.1    Messerschmitt, D.G.2
  • 7
    • 79952923866 scopus 로고    scopus 로고
    • Minimizing buffer requirements for throughput constrained parallel execution of synchronous dataflow graph
    • Jan.
    • T. Shin, H. Oh, and S. Ha, "Minimizing Buffer Requirements for Throughput Constrained Parallel Execution of Synchronous Dataflow Graph," ASP-DAC2011, Jan. 2011.
    • (2011) ASP-DAC2011
    • Shin, T.1    Oh, H.2    Ha, S.3
  • 8
    • 70350055226 scopus 로고    scopus 로고
    • Pipelined data parallel task mapping/scheduling technique for MPSoC
    • April
    • H. Yang and S. Ha, "Pipelined Data Parallel Task Mapping/Scheduling Technique for MPSoC," in Proc. of Design Automation and Test in Europe. pp. 69-74, April 2009.
    • (2009) Proc. of Design Automation and Test in Europe , pp. 69-74
    • Yang, H.1    Ha, S.2
  • 9
    • 34347362802 scopus 로고    scopus 로고
    • Exploring trade-offs in buffer requirements and throughput constraints for synchronous dataflow graphs
    • S. Stuijk, M. C. W. Geilen, and T. Basten, "Exploring trade-offs in buffer requirements and throughput constraints for synchronous dataflow graphs," in DAC'06 Proc. pp. 899-904, 2006.
    • (2006) DAC'06 Proc , pp. 899-904
    • Stuijk, S.1    Geilen, M.C.W.2    Basten, T.3
  • 10
    • 34547423275 scopus 로고    scopus 로고
    • Protothreads: Simplifying event-driven programming of memory-constrained embedded systems
    • Boulder, Colorado, USA, Nov.
    • A. Dunkels, O. Schmidt, T. Voigt, and M. Ali, "Protothreads: Simplifying Event-Driven Programming of Memory-Constrained Embedded Systems," in Proceedings of the Fourth ACM Conference on SenSys 2006, Boulder, Colorado, USA, Nov. 2006.
    • (2006) Proceedings of the Fourth ACM Conference on SenSys 2006
    • Dunkels, A.1    Schmidt, O.2    Voigt, T.3    Ali, M.4
  • 11
    • 19344371097 scopus 로고    scopus 로고
    • System level performance analysis - The SymTA/S approach
    • Mar.
    • Henia, R. and et al., "System level performance analysis - the SymTA/S approach," Computers and Digital Techniques, IEE Proceedings. 152, 2. pp. 148-166, Mar. 2005.
    • (2005) Computers and Digital Techniques, IEE Proceedings , vol.152 , Issue.2 , pp. 148-166
    • Henia, R.1
  • 12
    • 33750458973 scopus 로고    scopus 로고
    • System architecture evaluation using modular performance analysis: A case study
    • Nov.
    • Wandeler, E, and et al., "System architecture evaluation using modular performance analysis: a case study," International Journal on Software Tools for Technology Transfer (STTT). 8, 6. pp. 649-667, Nov. 2006.
    • (2006) International Journal on Software Tools for Technology Transfer (STTT) , vol.8 , Issue.6 , pp. 649-667
    • Wandeler, E.1
  • 14
    • 0026108176 scopus 로고
    • Static rate-optimal scheduling of iterative data-flow program via optimum unfoliding
    • Feb.
    • K. K. Parhi, "Static rate-optimal scheduling of iterative data-flow program via optimum unfoliding," IEEE Trans. on Computers. 40, 2., Feb. 1991.
    • (1991) IEEE Trans. on Computers , vol.40 , Issue.2
    • Parhi, K.K.1
  • 15
    • 0028428049 scopus 로고
    • Fully static multiprocessor array realizability criteria for real-time recurrent dsp applications
    • May
    • D. J. Wang and Y. H. Hu, "Fully static multiprocessor array realizability criteria for real-time recurrent dsp applications," IEEE Trans. On Signal Processing. 42, 5., May 1994.
    • (1994) IEEE Trans. on Signal Processing , vol.42 , Issue.5
    • Wang, D.J.1    Hu, Y.H.2
  • 16
    • 0027607336 scopus 로고
    • Scheduling of DSP programs onto multiprocessors for maximum throughput
    • June
    • P. D. Hoang and J. M. Rabaey, "Scheduling of DSP Programs Onto Multiprocessors for Maximum Throughput," IEEE Trans. On Signal Processing, 2225-2235, June 1993.
    • (1993) IEEE Trans. on Signal Processing , pp. 2225-2235
    • Hoang, P.D.1    Rabaey, J.M.2
  • 17
    • 0033281192 scopus 로고    scopus 로고
    • Partitioning and pipelining for performance-constrained hardware/software systems
    • Dec.
    • S. Bakshi and D. D. Gajski, "Partitioning and pipelining for performance-constrained hardware/software systems," IEEE Transactions on VLSI Systems. vol. 7, no. 4., pp. 419-432, Dec. 1999.
    • (1999) IEEE Transactions on VLSI Systems , vol.7 , Issue.4 , pp. 419-432
    • Bakshi, S.1    Gajski, D.D.2
  • 18
    • 0036625241 scopus 로고    scopus 로고
    • Hardware-software partitioning and pipelined scheduling of transformative applications
    • K. S. Chatha and R. Vemuri, "Hardware-software partitioning and pipelined scheduling of transformative applications," IEEE Trans. On VLSI. 10, 30., 2002.
    • (2002) IEEE Trans. on VLSI , vol.10 , pp. 30
    • Chatha, K.S.1    Vemuri, R.2
  • 20
    • 34547183989 scopus 로고    scopus 로고
    • Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
    • V. Suhendra, C. Raghavan, and T. Mitra, "Integrated scratchpad memory optimization and task scheduling for MPSoC architectures," in Proc. of CASES, 2006.
    • (2006) Proc. of CASES
    • Suhendra, V.1    Raghavan, C.2    Mitra, T.3
  • 21
    • 27944434745 scopus 로고    scopus 로고
    • Minimizing buffer requirements of synchronous dataflow graphs with model-checking
    • M. C. W. Geilen, T. Basten, and S. Stuijk, "Minimizing buffer requirements of synchronous dataflow graphs with model-checking," in Proc. of DAC'05, pp. 819-824, 2005.
    • (2005) Proc. of DAC'05 , pp. 819-824
    • Geilen, M.C.W.1    Basten, T.2    Stuijk, S.3
  • 23
    • 74549209632 scopus 로고    scopus 로고
    • Exploring trade-offs between performance and resource requirements for synchronous dataflow graphs
    • Y. Yang, M. Geilen, T. Basten, S. Stuijk, and H. Corporaal, "Exploring Trade-offs between Performance and Resource Requirements for Synchronous Dataflow Graphs," in Estimedia'09 Proc. IEEE, pp. 96-105, 2009.
    • (2009) Estimedia'09 Proc. IEEE , pp. 96-105
    • Yang, Y.1    Geilen, M.2    Basten, T.3    Stuijk, S.4    Corporaal, H.5
  • 24
    • 77953095861 scopus 로고    scopus 로고
    • Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs
    • Jun. Zhu, Ingo Sander, and Axel Jantsch, "Pareto Efficient Design for Reconfigurable Streaming Applications on CPU/FPGAs," in Proc. of DATE 2010. pp1035-1040.
    • Proc. of DATE 2010 , pp. 1035-1040
    • Zhu, J.1    Sander, I.2    Jantsch, A.3
  • 25
    • 34547357400 scopus 로고    scopus 로고
    • Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
    • S. Stuijk, T. Basten, M. C. W. Geilen, and H. Coporaal, "Multiprocessor Resource Allocation for Throughput-Constrained Synchronous Dataflow Graphs," in Proc. of DAC 2007, pp. 777-782.
    • Proc. of DAC 2007 , pp. 777-782
    • Stuijk, S.1    Basten, T.2    Geilen, M.C.W.3    Coporaal, H.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.