Transport characterisation of Ge pMOSFETS in saturation regime

European Solid-State Device Research Conference

Volumn , Issue , 2011, Pages 223-226

  Diouf, C ^a,b   Cros, A ^a   Monfray, S ^a   Mitard, J ^c   Rosa, J ^a   Boeuf, F ^a   Ghibaudo, G ^b  

^a STMICROELECTRONICS   (France)

^b IMEP LAHC   (France)

^c IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BULK GERMANIUM; CARRIER VELOCITY; DRIFT DIFFUSION; GERMANIUM DEVICES; MOS-FET; P-MOSFETS; PMOSFET; SATURATION REGIME; TRANSPORT QUALITY;

MOSFET DEVICES;

GERMANIUM;

EID: 82955195065     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2011.6044194     Document Type: Conference Paper

References (21)

1. K. Natori. "Current-voltrage characteristicss of silicon on insulator metal oxide semiconductor field effect transistors in ballistic mode". Japanese Journal of Applied physics, Part 1, vol.33, pp. 554-557, 1994
2. M. lundstrom. "Elementary scattering theory of the Si MOSFET". IEEE Electron Device Letters, vol.18, no. 7, pp. 361-363, 1997
3. P. Palestri, D. Esseni, S. Eminente, C. Fiegna, E. Sangiorgi, and L. Selmi. "Understanding quasi-ballistic transport in nano-MOSFETs: Part I-scattering in the channel and in the drain". IEEE Transactions on Electron Devices, vol.52, no. 12, pp. 2727-2735, 2005 (Pubitemid 41824854)
4. S. Eminente, N. Barin, P. Palestri, C. Fiegna, and E. Sagiorgi. "Small signal analysisof decananometer bulk and SOI MOSFETs for analog/mixed-signal and RF application using the time-dependant Monte Carlo approch". IEEE Transactions on Electron Devices, vol.54, no. 9, pp. 2283-2292, 2007 (Pubitemid 351485746)
5. A. Lochtefield and D. A. Antoniadis. "On experimental determination of carrier velocity in deeply scaled NMOS: How close to the thermal limit?" . IEEE Electron Device Letters, vol. 22, no. 2, 2001
6. A. Lochtefield, I. J. Djomehri, G. Samudra and D. A. Antoniadis. "New insight into carrier transport in n-MOSFETs" . IBM Journal of research and development, vol. 46, no. 2-3, pp. 347-357, 2002 (Pubitemid 34692356)
7. I. Pappas, G. Ghibaudo, C.A. Dimitriadis, C. Fenouillet-Béranger. "Backscattering coefficient and drift-diffusion mobility extraction in short channel MOS devices". Solid-State Electronic, vol. 53, pp. 54-56, 2009
8. G. Giusi, G. Iannaccone, D. Maji, and F. Crupi. "Barrier Lowering and Backscattering Extraction in Short-Channel MOSFETs". IEEE Electron Device Letters, vol. 57, no. 9, SEPTEMBER 2010
9. C. C. Yeo, B. J. Cho, F. Gao, S. J. Lee, M. H. Lee, C.-Y. Yu, C. W. Liu, L. J. Tang, and T. W. Lee. "Electron Mobility Enhancement Using Ultrathin Pure Ge on Si Substrate" IEEE Electron Device Letters, vol. 26, no. 10, OCTOBER 2005
10. G. Nicholas, T. J. Grasby, D. J. F. Fulgoni, C. S. Beer, J. Parsons, M. Meuris, and M. M. Heyns. "High Mobility Strained Ge pMOSFETs With High-κ/Metal Gate" . IEEE Electron Device Letters, vol. 28, no. 9, 2007
11. L. Clavelierl, J.F. Damlencourt, C. Le Royer, B. Vincent, Y. Morand, Y Campidelli, J.M. Hartmann, E. Martinez, Q.T. Nguyen, S. Cristoloveanu, S. Deleonibus and D. Bensahel."High hole mobility GeOT pMOSFETs with high-k / metal gate on Ge condensation wafers ". IEEE International SOI Conference Proceedings, pp. 19-20, 2007
12. B. De Jaeger1, G. Nicholas1, D. P. Brunco, G. Eneman1, M. Meuris, and M. M. Heyns, "High Performance High-k/Metal Gate Ge pMOSFETs with Gate Lengths down to 125 nm and Halo Implant". ESSDERC '07, pp. 462-465
13. G. Hellings, J. Mitard, G. Eneman, B. D. Jaeger, D. P. Brunco, D. Shamiryan, T. Vandeweyer, M. Meuris, M. M. Heyns, and K. D. Meyer. "High Performance 70-nm Germanium pMOSFETs With Boron LDD Implants" . IEEE Electron Device Letters, vol. 30, no. 1, 2009
14. J. Mitard, B. De Jaeger, F.E. Leys, G. Hellings, K. Martens, G. Eneman,D.P. Brunco, R. Loo1, J.C. Lin, D. Shamiryan, T. Vandeweyer, G. Winderickx, E. Vrancken, C.H. Yu, K. De Meyer, M. Caymax, L. Pantisano, M. Meuris, M.M. Heyns, "Record ION/IOFF performance for 65nm Ge pMOSFET and novel Si passivation scheme for improved EOT scalability". IEDM'08, pp. 1-4
15. D . Fleury, A. Cros, G. Bidal, J. Rosa and G. Ghibaudo. "A New Technique to Extract the Source/Drain Series Resistance of MOSFETs". IEEE Electron Device Letters, vol. 30, no. 9, 2009
16. B. Sheu and P. K. Ko. "A capacitance method to determine channel lengths for conventional and LDD MOSFET's". IEEE Electron Device Letters, vol. 5, pp. 491-493, November 2010
17. Y. Chang, Y. Wu, and C. Ho, "A simple method to extract source/drain series resistance for advanced MOSFETs ". ESSDERC '07, pp. 87-90
18. G. Ghibaudo "A new method for the extraction of MOSFET parametters". IEEE Electron Device Letters, vol. 24, pp. 543-545, APRIL 1988
19. D . Fleury, G. Bidal, A. Cros, G. Ghibaudo. "New Experimental Insight into ballisticity of transport in strained bulk MOSFETs". Symposium on VLSI Technology, Kyoto, 2009
20. C. Jacoboni, C. Canali, G. Ottaviani, and A. A. Quaranta., "A review of some charge transport preperties of silicon". Solide State Electronics, vol 20, no 2, pp. 77-89, 1977
21. M. Zilli, P. Palestri, D. Esseni and L. selmi . "On the experimental determination of channel back-scattering in nanoMOSFETs. Pp. 105-108, Piscataway, NJ, USA, 2007". Symposium on VLSI Technology, Kyoto, 2009