S-passivation of the Ge gate stack: Tuning the gate stack properties by changing the atomic layer deposition oxidant precursor

Journal of Applied Physics

Volumn 110, Issue 8, 2011, Pages

  Sioncke, S ^a   Lin, H C ^a   Nyns, L ^a   Brammertz, G ^a   Delabie, A ^a   Conard, T ^a   Franquet, A ^a   Rip, J ^a   Struyf, H ^a   De Gendt, S ^a,b   Muller M ^c   Beckhoff, B ^c   Caymax, M ^a  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c PHYSIKALISCH TECHNISCHE BUNDESANSTALT   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ATOMIC LAYER DEPOSITION; DEFECT DENSITY; ECONOMIC AND SOCIAL EFFECTS; GATE DIELECTRICS; GERMANIUM OXIDES; HIGH-K DIELECTRIC; INTERFACE STATES; LOGIC GATES; OXIDANTS; PASSIVATION;

CMOS DEVICES; CRITICAL ISSUES; EQUIVALENT OXIDE THICKNESS; GE(100) SURFACE; GROWTH BEHAVIOR; INTERFACE PROPERTY; INTERFACE STATE DENSITY; LOW DEFECT DENSITIES;

GERMANIUM;

EID: 80655141505     PISSN: 00218979     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.3622514     Document Type: Article

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