An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores

Proceedings - Design Automation Conference

Volumn , Issue , 2011, Pages 729-734

  Saripalli, Vinay ^a   Mishra, Asit ^a   Datta, Suman ^a   Narayanan, Vijaykrishnan ^a  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

Heterogeneous Multi Core; Tunnel FETs

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; ENERGY EFFICIENCY; THRESHOLD VOLTAGE;

DESIGN AND SIMULATION; DEVICE CHARACTERIZATION; HETEROGENEOUS CMPS; HETEROGENEOUS MULTI-CORES; LOW VOLTAGE OPERATION; MULTI- THREADED APPLICATIONS; TUNNEL FET; WORKLOAD EVALUATION;

TUNNEL FIELD EFFECT TRANSISTORS;

EID: 80052671830     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2024724.2024889     Document Type: Conference Paper

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